| The wide applications of wireless power transfer technology has provided many conveniences in our modern life.Especially in some special applications(such as implantable medical treatment),wireless power transfer has irreplaceable advantages over wired power transfer method.In these applications,the volume and power consumption are strictly limited,and the device is in a closed space isolated from the outside.Wireless power and data transfer has become the best solution for these devices.In most previous studies,power and data transmission are often allocated to different physical links.Although these systems meet the requirements of application scenarios to a large extent,the existence of multiple transceiver systems will increase the volume and power consumption.On the other hand,the existing Simultaneous Wireless Power and Data Transfer(SWPDT)system still has many defects,such as data transfer rate is sensitive to coupling coefficient,as well as power transfer efficiency greatly affected by data transmission.Therefore,this thesis first proposes a SWPDT system based on Parity Time symmetry-Wireless Power Transfer(PTs-WPT).The traditional SWPDT method is easy to break the PTs of the system.In this thesis,the baseband signal is coupled into a self-excited oscillator,and the modulation as well as downlink transfer of baseband signal are completed by using the nonlinear characteristics of the amplifier.A complete system model is established,and verified by simulation and experiment.The experimental results show that,in the strong coupling region,the PTs-SWPDT system has better robustness compared with the traditional system in terms of power and data transmission.When changing the transfer distance of the same size of the coil,load received baseband signal amplitude variation of PTs-SWPDT system is about 8.7%,while that of the traditional system is close to 50%.Then,this thesis proposes a low power transfer efficiency loss SWPDT system based on Load Shift Keying(LSK).The system uses two resonance points of CCL structure,the low frequency point is used for power transfer,while the high frequency point is used for data transfer.The two signal are separated by wave filter in receive end.Since the load modulation is only completed at the data transmission frequency,the system avoids the serious reduction of power transfer efficiency caused by the load modulation.At last,this thesis gives the technical implementation details of the CCL structure based SWPDT system,and verifies the feasibility through the FPGA platform.On this basis,this thesis builds a cm-level implantable neural signal recording engineering prototype,STM32 is used as MCU and ADS1299 as the neural signal recording chip.The experimental results show that when the load is lower than 70Ω,the voltage gain of the system decreases by about 0.01 d B/Ω,while the value of the traditional system which using SP structure is 0.18 d B/Ω.In the range of 10 kbps to 100 kbps,the system proposed in this thesis is 150% of the power transfer efficiency of the traditional system. |