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Implementation Of Low Precision Neural Network Based On PYNQ

Posted on:2023-12-06Degree:MasterType:Thesis
Country:ChinaCandidate:S K WangFull Text:PDF
GTID:2558306614472704Subject:Computer technology
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Convolutional neural networks all have deep model depths and a huge number of parameters,which hinder their application on embedded devices with low power consumption and low hardware resources.FPGA has the characteristics of easy parallelism,high flexibility and low energy efficiency.Reducing model complexity and parameter quantity and deploying convolutional neural network on FPGA has become a research hotspot in recent years.This paper adopts the method of parameter quantization and proposes a method to quantize the convolutional neural network,which quantizes the parameters of the neural network from floating-point precision to fixed-point precision with a low bit width such as 1-bit.The convolution kernel trains inference on low-bit-width weights,activations,and gradients,which greatly reduces computation and computation time.Design the ImageNet network topology with 1-bit weights and 2-bit activation parameters,and the PascalVoc network topology with 1-bit weights and 3-bit activation parameters.The comparison with floating point precision shows that the computational complexity of the two network topology parameters is greatly reduced,achieving 51.3% Top-1 accuracy and 75% Top-5 accuracy on ImageNet,and m AP of 53.1% on PascalVoc ’s accuracy.Aiming at the optimization of quantized neural network on FPGA,a cyclic flow architecture in BRAM is proposed to achieve layer-to-layer parallelism through computing units.Design a matrix-vector threshold multiplication unit,in which the PE used for dot product calculation is optimized by SIMD pipeline convolution calculation;the matrix interleaving sorting technology is used to convert the calculation into an ordinary matrix multiplication operation;the matrix folding technology is used to optimize the hardware resource utilization with computing space;Using the HLS design tool to further optimize the architecture and computing units to generate IP cores,and then integrate the overall hardware path in the Vivado environment.Finally,the PYNQ-Z2 development board is used to build the system platform to realize the two designed neural networks.Use Python language to call ARM processor and FPGA hardware resources to complete preprocessing,inference calculation and result analysis of image data.Experiments show that PYNQ-Z2 has achieved satisfactory performance in both experiments of image classification and recognition.The processing time of image classification and recognition is about 1.2s and the power consumption of the system is about 2w,which proves the realization of a low-precision neural network based on PYNQ feasibility.
Keywords/Search Tags:FPGA, Convolutional neural network, PYNQ, Image classification and recognition
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