Design And Verification Of D2D Controller Based On Hierarchical Structure

Over the past fifty years,the number of transistors integrated on a chip has doubled every two years under the guidance of Moore’s Law,and its speed and efficiency have continued to improve,but since the semiconductor process has entered the 28 nm node,the research and development costs and physical limitations brought by advanced processes have increased the difficulty of continuing Moore’s Law.Against this background,the chiplet technology makes it possible to maintain a balance between performance,manufacturing costs and physical limits.Designers divide complex So C into multiple dies according to their functions,complete the interconnects between dies and package them in a multi-chip module,and the multiple dies work together as a whole.Chiplet technology brings benefits as well as great challenges,and die-to-die communication has become a key factor affecting its integrity.The D2D(Die-to-Die)IP mainly studied in this subject is an IP used for communication between die and die,and its controller part is designed and verified in this paper.Based on the full study of D2 D IP four-level hierarchical architecture,D2 D physical layer characteristics and overall structure,AXI and APB bus protocols in AMBA bus,the design work of D2 D controller is carried out.The modular design idea is adopted in the design to divide the D2 D controller into user interface layer sending module,user interface layer receiving module,transaction layer sending module,transaction layer receiving module,data link layer sending module,data link layer receiving module,link management module,register module.The two modules of the user interface layer can realize the interaction between the AXI bus and the D2 D IP,and ensure the fairness of the data transmission of the five independent channels of AXI bus through round-robin arbitration,and avoid data loss caused by buffer overflow at the receiver end through channel-based flow control.The two modules of the transaction layer can realize the mutual conversion of the data of the user interface layer and the data form that the D2 D physical layer can process.The data link layer can realize the CRC check of the data,and through the retransmission of the wrong data to ensure the correctness of the overall data transmission.The link management module can realize the link training for testing the link stability.The register module can realize the control of the transmission behavior of the D2 D controller,and the display of the transmission and interruption status of the D2 D controller.The finally realized D2D controller can ensure the correctness of data transmission while completing the mutual conversion between the AXI signal and the data form that the D2 D physical layer can process.After the design of the D2 D controller is completed,the verification of the D2 D controller is carried out on the basis of fully studying the UVM universal verification methodology.In the verification,a verification platform framework suitable for D2 D controllers is designed based on the UVM universal verification methodology,and each component in the verification platform is designed,the relevant components used to drive the AXI and APB interfaces all use the verification IP,the platform can generate AXI and APB stimuli,and automatically collect and compare the AXI interface signals at the input and output ends of the design under test,at the same time,according to the extracted verification function points,a coverage component is also added to the verification platform to realize the automatic collection of functional coverage.After completing the construction of the verification platform,write test cases to cover the extracted verification function points,and analyze the simulation results,so that all test cases can be executed correctly.Finally,the code coverage and functional coverage are collected by regressing all test cases,and the entire verification process is quantified by the coverage to ensure the completeness of the verification.The code coverage rate after regression collection analysis is 99.71%,and the function coverage rate is 100%,which proves that the D2 D controller can execute all functions correctly.On the basis of the correct function of the D2 D controller,the performance test is carried out under the ideal data transmission situation,the actual data bandwidth on a single link of the D2 D physical layer is 153.6Gb/s,after a series of processing by the D2 D controller,the data bandwidth there is some loss,but it can still reach 138Gb/s,and the data bandwidth utilization rate of the D2 D controller to the D2 D physical layer can reach 90%.