RF Hardware Circuit Design Based On Synthetic Broadband FMCW Radar

Ultra-wideband FMCW radar is to modulate the continuous wave frequency,and the receiver receives the echo signal reflected by the target through signal processing to obtain the distance,angle and speed information of the target.Ultra-wideband FMCW radar has the advantages of small transmission power,simple structure,high sensitivity and high resolution.Ultra-wideband FMCW radar can be well used in airport running foreign object detection,high-precision ranging,road car speed measurement and so on.Based on the application prospect of ultra-wideband FMCW radar,this thesis designs the transmitter and receiver of ultra-wideband FMCW radar.The radar has an operating frequency of 1.8GHz-3.2GHz,an operating bandwidth of 1.4GHz,and a theoretical distance resolution of 22 cm for the radar,achieving high resolution.The ultra-wideband FMCW radar designed in this thesis can be applied to scenarios such as high-precision target detection.First of all,according to the radar design indicators to determine the design scheme of the transmitter and receiver,the transmitter adopts the structure of analog phaselocked loop,which can directly generate a linear FM signal of 1.8GHz-3.2GHz.Starting from the design index,the local oscillator signal amplifier and the RF signal amplifier are designed,and the input and output matching networks of the amplifier are designed according to the wideband matching theory,which reduces the mismatch loss of the transmitter.At the same time,the phase noise and locking time of the phase-locked loop are simulated,and the simulation results meet the design requirements.The structure of the receiver is a low-if-frequency receiver,which analyzes the key parameters such as noise figure,sensitivity and dynamic range of the receiver,and designs the matching network of the cascaded low-noise amplifier by using the structure of the series parallel microstrip line,which reduces the reflection coefficient between the two amplifiers and between the receiver and the antenna,and improves the sensitivity of the receiver.At the same time,according to the parameters of the selected chip,the important parameters such as the sensitivity,noise figure and receiver gain of the receiver are simulated in the ADS,and the simulation results meet the design specifications.The transmitter and receiver power system is then designed for the power supply requirements of the transmitter and receiver chip.The power supply system adopts the structure of power management chip and linear voltage regulator,designs the ripple suppression circuit according to the target impedance method,and simulates the target impedance of each chip power supply system,and the simulation results meet the requirements.In order to suppress the coupling between the power supply system and the RF signal,a four-stage sector array cascaded power supply decoupling network is designed,and the S-parameter of the four-stage sector array cascaded power supply decoupling network is simulated,and the rejection ratio of the decoupling network to the power supply and RF signal is better than 70 d B.Finally,the transmitter and receiver were welded and debugged,and the corresponding test platform was built.The output power,phase noise,linearity and effective bandwidth of the transmitter are tested,the test results meet the design indicators,the reflectance coefficient,sensitivity,dynamic range and other indicators of the receiver are tested,most of the results of the receiver meet the indicators,the reasons for the slightly worse indicators are analyzed,and the direction of improvement is proposed.