Key Technology Research And FPGA Implementation Of Satellite Digital Baseband Channel Simulator

With the rapid development of a new generation of constellation satellite systems,the space-ground integrated communication network has become an important trend in the future development of the communication field.However,the development of related equipment or the design and planning of constellations based on the real satellite communication system is generally time-consuming and expensive,and the satellite channel simulator can be an effective alternative to reduce the cost of various resources in the research process.Through the satellite channel simulator,different communication channel environments can be easily built,which facilitates the development of communication systems in less time and cost.In addition,conventional channel simulators mainly simulate a single link,and real-time simulation of multiple links and highly dynamic topology in large-scale constellation scenarios becomes helpless.The satellite digital baseband channel simulator designed in this thesis adopts Gaussian channel and noisy Rice channel for the different interstellar and satellite-ground links to build models,which can simulate the satellite channel changes in multi-link topology in real time,and effectively simulate the fading,delay,bit error and other characteristics of satellite channels.The main work of this thesis is as follows:(1)Firstly,the transmission characteristics of the satellite channel are analyzed,and the probability distribution function commonly used in the models is derived and described mathematically.The typical satellite channel models such as C.Loo model,Corazza model,Suzuki model and residuary bit errors in satellite baseband channels are studied.It is determined that this thesis uses the baseband residual error model and the Gaussian channel model as the basis implementation model of the Simulator.(2)Secondly,the overall framework of satellite digital channel simulator is introduced,including control platform,real-time simulation platform and discrete simulation database.In addition,a simulation platform for satellite-ground links is built.The generation methods of Gaussian white noise and uniform random numbers are emphasized.A multiplexed parallel low-complexity Gaussian sequence generation method that is easy to implement in hardware is proposed,which can greatly reduce the hardware resource consumption of the system.(3)For satellite-ground links with more complex channel environments,this thesis conducts a large number of simulation analysis of baseband error characteristic parameters and gives its hardware implementation method,and designs and implements the corresponding hardware error generation module on the FPGA.In addition,GMII and MII-based interface design is made for the data channel of a single link.Finally,the bit error performance of the channel simulator system are tested,and it is verified that all indicators can meet the system requirements.