Third Quadrant Characteristic Optimization And Device Design Of SiC MOSFET

Driven by the global"dual carbon"strategy,SiC MOSFETs are favored in this green revolution due to their performance advantages such as high breakdown field strength,high power density,and high switching frequency.With the gradual application of SiC MOSFETs to power management fields such as inverters,their body diode performance and third quadrant characteristics have also received extensive research and attention.The following problems exist in body diode freewheeling using SiC MOSFETs:high forward voltage drop when conducting;As a bipolar type of conduction,the reverse recovery loss is large;The energy released by carrier recombination during bipolar conduction will further lead to bipolar degradation of the device.Therefore,the industry often uses external reverse parallel Schottky diodes for freewheeling,but this can lead to issues such as increased module size and system costs.In order to optimize the third quadrant characteristics of SiC MOSFET devices,this thesis proposes two novel monolithic integrated unipolar freewheeling-diode SiC MOSFET device structures based on planar gate and trench gate SiC MOSFETs,respectively.The new structures are studied and analyzed using the Sentaurus TCAD.1.A planar gate SiC MOSFET device with integrated channel rectifier（MCR-MOS）is proposed.The gate of this structure adopts a split gate structure.One side of the gate controls the switching of the MOSFET to ensure the normal performance of the device,while the other side is equipotential with the source electrode,which is used to control the switching of the channel rectifier to achieve a unipolar type and low forward voltage drop during the third quadrant operation;A P-type shielding layer is added to weaken the electric field strength of the oxide layer at the bottom corner of the split gate,while also achieving the goal of reducing the Miller capacitance of the device;In addition,an N-type conductive layer is added to the surface of the device,which can not only introduce the current on the MOS side from the channel to the drift region during forward conduction,reducing the device’s on-resistance,but also form an accumulated channel on the MCR side,further reducing the third quadrant conduction voltage.The comparative simulation results of MCR-MOS and C-MOS show that the third quadrant turn-on voltage of MCR-MOS is 1V,and the high-frequency figures of merit R_on,sp×Q_GD and switching loss are 119.5 mΩ·n C and 3.66 m J/cm²,respectively,which are reduced by 68%and 43%compared to C-MOS,respectively.2.A trench gate SiC MOSFET device with integrated heterojunction diodes（HJD-TMOS）is proposed.This structure introduces a P+polysilicon region with equal potential to the source electrode by removing the oxide layer at the bottom of the gate trench,and forms a heterojunction diode in direct contact with SiC;In order to protect the trench gate oxide layer and reduce leakage current,a P+shielding layer is introduced at the bottom corner of the trench;In order to weaken the adverse effect of the JFET region composed of the P+shielding layer and the P-base region on the on-resistance,a two-step epitaxial process was used to introduce an N-type current expansion layer to reduce the specific on-resistance of the device.The comparative simulation results of HJD-TMOS and C-TMOS show that the third quadrant turn-on voltage of HJD-TMOS is 1.65V,the turn-on loss and turn-off loss are reduced by 38%and 40%respectively compared to C-TMOS,and the high frequency figures of merit is only 45%of C-TMOS.