Study On Novel Structures For 1.2kV SiC MOSFETs

As a unipolar power device,SiC MOSFET has higher switching speed and lower switching loss than Si bipolar devices,which allows SiC MOSFET to maintain higher efficiency at higher operating frequencies.Thanks to improvements in material quality and fabrication process,SiC MOSFETs have entered the market since 2010,and been widely used in photovoltaic inverters,railway traction inverters,uninterruptible power supplies,all-electric and hybrid vehicles and other applications.There is always a need to use the PN body diode of SiC MOSFET for freewheeling in applications.However,the conduction of the SiC PN body diode would lead to bipolar degradation.Meanwhile,due to the wide band gap of SiC,the turn-on voltage of PN junction body diodes is high,which leads to high freewheeling loss.Besides,due to the high critical breakdown electric field and high dielectric constant of SiC,SiC MOSFETs also face the problem of excessively high gate oxide electric field in the blocking state,which is particularly severe in SiC UMOSFETs.In this work,a novel SiC MOSFET embedding low barrier diode（LBD-MOSFET）is proposed to eliminate bipolar degradation and improve third quadrant performance.The poly Si of LBD-MOSFET splits into two parts,one is electrically connected to the gate electrode as a poly gate,while the other one is shorted to the source electrode as a“dummy gate”.Meanwhile,a N type base region is formed below the“dummy gate”.The conduction energy band bends in the base region due to the depletion charge,resulting in a low potential barrier from JFET region to N⁺source region at the SiC/SiO₂interface.The potential barrier functions as a unipolar diode（LBD）with a turn-on voltage is only 0.75V,and is about 3 times lower than the SiC PN body diode.Meanwhile,LBD-MOSFET exhibits about 3 times lower reverse recovery charge than conventional MOSFET（C-MOSFET）,and is free from bipolar degradation,thanks to the unipolar operation of the LBD.Furthermore,the gate-to-drain charge and switching loss of LBD-MOSFET are significantly reduced by about 95%and 40%respectively,in comparison with C-MOSFET,owing to the reduction of the overlapping area of the gate and drift region.Therefore,the obtained high frequency figure of merit R_on×Q_gdfor LBD-MOSFET is only 74mΩ·n C improved by about 13 times compared with C-MOSFET.A compact LBD potential barrier analytical model,which reveals the influence of gate oxide thickness,base region doping concentration and thickness on the potential barrier height,is also developed to help design the structure.A P⁺shield region at the bottom of the trench gate is usually adopt to mitigate the gate oxide electric field of SiC UMOSFETs.However,the existence of the P⁺shield region introduces new JFET regions,leading to an increase of the specific on-resistance.In order to solve the problems above,a novel SiC MOSFET with self-adjust P⁺shield region potential（JP-MOSFET）is proposed in this thesis.The floating/grounded state of the P⁺shield region is controlled by the switching of the integrated PMOS.At the blocking state,the P⁺shield region is grounded,contributing to a better protection of the gate oxide.At the on state,the P⁺shield region becomes floating,resulting in a smaller specific on-resistance.Simulation studies shows that the maximum electric field of JP-MOSFET gate oxide at the blocking state is 0.92MV/cm,which is far below the gate oxide reliability limit of 3MV/cm.Meanwhile,the specific on-resistance of the JP-MOSFET is only 1.54mΩ·cm²,which is reduced by 20%compared with conventional SiC UMOSFETs with grounded P⁺shield region.Furthermore,the gate-drain charge and the gate-on charge of the JP-MOSFET are reduced by 40%and32%,respectively,due to the reduction of the trench gate density.Therefore,the two high frequency figures of merit R_on×Q_gdand R_on×Q_swof the JP-MOSFET are improved by 52%and 47%,respectively.In order to improve the third quadrant performance and eliminate the bipolar degradation phenomenon of SiC MOSFET,LBD-MOSFET is proposed in this thesis.LBD-MOSFET has excellent third quadrant and switching performance and more importantly,is free from bipolar degradation phenomenon.Meanwhile,JP-MOSFET is proposed in this thesis to achieve a better trade-off between gate oxide reliability and specific on resistance.While maintaining high gate oxide reliability,JP-MOSFET achieves a significant reduction in specific on resistance.Meanwhile,the high frequency figures of merit of those two structures are both significant improved.The overall enhanced performances make SiC LBD-MOSFET and JP-MOSFET excellent choices for high frequency and high reliability power electronic applications.