Research On Key Technology Of Mass Data Transmission And Storage For High Speed Camera Based On Camera Link

High-speed videogrammetry is an important branch in the field of photogrammetry and the main research frontier in the field of engineering experiments,and industrial cameras with high resolution and high frame rate are the development trend in the field of high-speed video measurement.High frame rate,high resolution camera data acquisition speed can reach 800 frames per second or even thousands of frames,the massive amount of data in the transmission and storage process is easy to cause the buffer pool of data overflow and frame loss.And as the complexity of engineering experimental scenarios increases,the traditional way of building equipment with the main controller and industrial control machine will increase the complexity of the experiment.To address these problems,this thesis focuses on the key technology of high-speed camera transmission and storage,and studies FPGA as the control module in high-speed camera acquisition and storage,describes the solution in massive data transmission and storage and builds hardware devices for testing.The main contents of this thesis are as follows.(1)For the problem of high-speed camera mass data transmission and storage,this thesis researches an adaptive transmission and storage scheme for high-speed video mass data based on Camera Link protocol,which ensures efficient data transmission and storage through the scheme of adaptive buffer pool size and buffer cyclic buffering with IPC memory and the asynchronous writing algorithm of IOCP,and also through the adaptive hard disk The new frame structure is designed to solve the frame loss problem during the storage process.The relationship between the buffer pool size and the memory of the IPC is determined through experiments,and the size of the circular buffer is optimized to fit the size of the captured images,and the efficiency of the transmission is increased by using the circular buffering of the buffer.The asynchronous storage method of IOCP and the sequence number filtering in the frame structure are used to solve the frame loss problem in the storage process.The advantage of the above algorithm lies in the design of circular read/write buffer,which avoids the problem of linear reading of buffer pool and thus data overflow,and also combines the hard disk buffer algorithm in the storage process and the thread management of IOCP,which overcomes the shortcomings of the traditional byte stream writing algorithm that does not fully rely on the performance of storage media and speeds up the storage efficiency.(2)To address the complex problem of building experimental equipment in large engineering experiments,a high-speed video acquisition system based on FPGA is designed.The system uses FPGA as the control unit,connects to the high-speed camera acquisition card through PCIE interface,uses SDRAM on the board for cyclic buffering of data,and reads into the external hard disk to complete the storage of massive data.The FPGA is used as the main controller to exchange data with the camera acquisition card through the PCIe4.0 interface during the acquisition phase,cyclic buffering through the two SDRAM memories on the FPGA board during the data transfer phase,and storage through an external hard disk during the storage phase.The above solution solves the disadvantages of complex and time-consuming construction of experimental scenarios of IPC and high-speed camera through FPGA as the main control unit,meanwhile,the builtin chip of FPGA can realize the acceleration of acquisition and storage without the time loss of data exchange with the motherboard and CPU,which increases the storage efficiency.(3)Based on the solution proposed in this thesis,a high-speed video measurement system is designed and implemented,and the related control software and experimental verification are realized.Experiments on buffer pool size and circular buffering during transmission were designed to verify the efficiency and feasibility of the algorithm by comparing it with other buffering methods,and the experiments proved that no frames are lost during real-time acquisition and storage.The system hardware uses Camera Link camera capture card,CL600 high-speed camera and optical fiber media as data sources,and the storage uses M.2 interface solid state drive as writing device and Xilinx FPGA board.The experimental results show that the real-time storage speed of the high-speed video capture and storage system can reach 1.3GB/s,and the stored data is complete without frame loss.