Research And Design Of Video Stream Rotation And Scaling System Based On FPGA

With the development of digital image processing algorithms and high-speed video transmission technology,people ’s requirements for image quality are constantly improving.In particular,due to the angle deviation between the imaging device and the observed target,the image quality received by the human eye is degraded.Therefore,based on the FPGA development platform and digital image processing technology,this paper studies the rotation and scaling algorithm of video images.Aiming at the shortcomings of large occupied area and large delay of the trigonometric function calculation module in the rotation algorithm,a parallel CORDIC algorithm based on Ladner Fischer adder is designed.The advantages of low delay and small hardware consumption of the system are verified on the Vivado platform.The system realizes the rotation and scaling of video images.The main work of this paper is summarized as follows.(1)Image rotation algorithm optimization based on FPGA hardware platform.The rotation matrix operation uses CORDIC algorithm to calculate the sine and cosine values.In order to reduce the hardware consumption and output delay of the CORDIC calculation module,combined with different parallel prefix adders,a parallel CORDIC algorithm based on Ladner Fischer adder is obtained by horizontal comparison.It performs well in terms of area and speed.Experiments show that the number of LUTs used in the algorithm is 16647,and the delay is102.237 ns.(2)System scheme formulation and circuit design.Aiming at the functional and performance requirements of the system,combined with cost budget,development cycle,flexibility and other considerations,this paper designs an image rotation and scaling system based on FPGA hardware platform.Firstly,the functional modules in the system are formulated and demonstrated.Secondly,when building the hardware system,the main chips such as the core processor are screened and the related circuits are designed,analyzed and tested.Finally,the system function module is preliminarily defined based on the hardware platform designed in this paper.(3)Function module design and test.According to the idea of modularization,the system function modules are divided based on the hardware circuit designed in this paper.The modules are programmed by Verilog HDL language on Vivado,and the key technologies are described.In order to give full play to the advantages of FPGA parallel computing ability,ping-pong thought and pipeline structure are used in the design to improve the operation speed of the system.After the logic code design is completed,ILA is used to verify and analyze the function and timing of the system.(4)System overall test.The test environment is built by using 4K ultra-high-definition TV,HDMI signal generator and HDMI data line to verify the image rotation and scaling function and performance of the system.The experimental results show that the system can scale and rotate the input HDMI video image.The maximum rotation and scaling output delays of the input 4K @ 60 Hz video are 39 ms and 37 ms,respectively.The number of LUTs used by the system is 19932,and the delay is 102.237 ns.The total power consumption of the system is1.885 W.