The Design Of New Missile Borne Data Memory Based On FPGA

In the test of the missile system, the data storage device is mainly used for recording the incoming signals received by the sensor as well as a variety of parameters during the flight. With the improvement of missile borne storage demands, it is imperative to design a data storage device which can be adapted to test signal diversity, real-time and stability. In this thesis, a kind of data storage equipment with the basic architecture of FPGA plus e MMC FLASH is proposed, and the development trend of solid state storage is analyzed, also a controller design framework based on serial UFS2.0 protocol is proposed. And all these are to meet the need of memory development in future requirement. According to the performance demands of data storage device in missile borne work circumstance.This thesis mainly accomplished three aspects work as follows:1. According to the performance characteristic of e MMC FLASH memory chip and the FPGA chip, this thesis designs a storage architecture based on e MMC FLASH storage parallel. The hardware design of the storage card is described in detail. Specify the design principle and method of power project, high speed interface, clock assign etc.2. Design the logic design of e MMC FLASH parallel storage architecture in detail. Then, describes the basic process of storage while states the design method and realization process of the storage of read and write, erase, and CRC check. And the Ethernet communication between the card and the host computer is realized. In addition, the actual function is completed on the board.3. Considering the limitations of the e MMC FLASH itself, a high-speed serial storage architecture based on UFS 2.0 protocol is proposed, designs the basic framework of UFS 2.0 controller based on FPGA high speed serial transceiver GTX, and realize a series function of some modules.This thesis completes the hardware and software design of the data storage equipment which is based on FPGA plus e MMC FLASH architecture, and analyzes the advantages of high speed serial bus, then designs the basic framework of UFS2.0 controller, has a certain reference value in engineering.