Design And Application Of High Speed General Serial Interface Based On FPGA

With the rapid development of digital signal processing technology, a new challenge is brought by the increasing data throughput. The system of high-speed serial transmission has replaced the parallel data transmission in some areas. It improves the rate of transmission and reduces the cost and difficulties of the system. The high-speed serial transmission with FPGA has gradually become an important means to realize the high-speed digital signal processing platform.The main research contents of this thesis are as follows:Firstly, this thesis introduces the high-speed serial gigabit transceiver interface(GTP) of the Xilinx FPGA chip. It expounds that the GTP is suitable for high-speed serial transmission applications in the application area, the internal structure and the operational principle. The usage method and configuration of the GTP design are briefly illustrated. It verifies the ideas and results of GTP design by the simulation platform.Secondly, this thesis provides the principle of the interface design with Xilinx FPGA Serial Rapid IO(SRIO) based on the Rapid IO protocol. The design thinking of high-speed signal processing system based on SRIO is presented. The work patterns of SRIO are simulated and tested by the general hardware test platform of the SRIO. It verifies the systematic design of SRIO based on FPGA and analyzes the performance of high-speed interface based on SRIO in detail.Then, this thesis presents the design thinking of memory device with PCI Express(PCI-E) interface based on the protocol of PCI-E and tests the read-write operation of the PCI-E hardware test platform. It verifies the systematic design of PCI-E interface based on FPGA and analyzes the performance of high speed interface based on PCI-E.Finally, this thesis describes the principle of Serial ATA(SATA) controller design with Xilinx FPGA based on the protocol of SATA. The design thinking of hard drive controller based on SATA is presented. The read-write operation of the SATA is tested by building a hardware test platform. The systematic design of SATA interface on FPGA is verified, and the performance of high-speed interface based on SATA is analyzed and tested.In this thesis, it introduces several high-speed serial transmission systems on the FPGA platform and the idea of systematic design and provides the related testing and verification. By the use of high-speed serial transmission system based on FPGA, it can simplify the design, reduce the cost and improve the system performance in the systematic design.