High-Speed EMMC Array Controller Based On FPGA Design And Implementation

With the rapid development of information industry, people's demand for data storage of high speed and large capacity is growing. As an embedded memory chip, the eMMC has features of simple interface, large capacity storage, rapid transmission and high integration, making it widely used in mobile phones, tablet computers and other consumer electronic products and mobile multimedia devices. The eMMC controller, as a core part of eMMC storage system work, has the extremely high research significance and engineering application value.According to the research background and the actual engineering demand, this paper in-depth analyzes and researches on eMMC related protocol specification, giving the overall design of high-speed eMMC array controller based on FPGA. With the FPGA chip of Virtex- 6 series in Xilinx Company as a development platform, this paper gives the hardware system design, and realizes the eMMC array controller according to the controller design scheme. As a carrier for storage with eMMC array, the test of this array's high-speed reading and writing functions is realized through the eMMC array controller. Using the Rocket IO GTX transceiver hardcore in FPGA internal integration to realize high-speed serial transmission of data in the system, on the one hand, the data exchange between the eMMC array controller and the user interface is completed, on the other hand, the data communication between the eMMC array controller and the eMMC array is finished. The main work in this paper is as follows:1. Completed the overall design scheme of eMMC array and the design and implementation of a hardware system based on FPGA. In addition, with the characteristics, structure and transceiver module of high-speed GTX transceiver in the system analyzed and researched, the high-speed serial data transmission function of the system is designed and implemented.2. Through a research on the eMMC4.5 protocol standard, the overall design of eMMC array controller and the detailed design and implementation of each module in the controller is completed. Among them, the designed main modules in the eMMC controller include a clock and reset module, an initialization module, a main control module, a command interface module, a data processing module and a cache control module.3. Completed the eMMC array controller the burr clock switching module, command and response, CRC checking module, initialization process, the software of data read and write function simulation and online logical function and timing verification.4. On the system platform based on FPGA, giving a systematic and completed verification of the eMMC array controller, the systematic verification of high-speed data read and write process in eMMC array is finished with the high-speed GTX transceivers linked to eMMC storage array by eMMC array controller. The verification results show that FPGA-based high-speed eMMC array controller designed in this paper achieved with stable performance, versatility, and simple interface and portability advantages. Users need not pay attention to the protocol underlying the hardware, with operating simply and meeting every function and technical specification of project demands.