Research On High Performance Integrated Aerospace Electronic Technology

To satisfy the important desires of national aerospace development and technological innovation,and to promote the upgrading of aerospace products and technologies,it is necessary to carry out research on key technologies in the frontier direction.The key technologies can provide technical support for aerospace missions and applications,and enhance technical reserves.Space integrated electronic is the core electronic device of spacecraft.Overall plan should be made to achieve high performance,lightness and low cost by building a high performance,modular,and reconfigurable space integrated electronic system architecture.This paper attempts to solve the problems existing in the domestic space integrated electronic system,such as low performance,low modularity,and poor universality.To meet the increasing needs of the future integrated electronic system for small and medium sized spacecrafts,this paper presents a relatively complete and high performance integrated system solution.The novel solution achieves high performance,high reliability,high functional density,and high efficiency of the system through reasonable system architecture,information processing flow,protocol and software/hardware interface.By combining standardization,modularization,and generalization,this paper will solve the problems of poor information transmission,tight coupling between software and hardware,and will enhance the interoperability and reusability of software and hardware.Based on the comprehensive research of the current integrated electronic system architecture and specific implement technologies,this paper has carried out a detailed study on integrated electronic technology in combination with the actual engineering needs in the future.Domestic and foreign integrated electronic system architecture is analyzed,and a comprehensive electronic system structure model with certain openness is proposed.The demonstration and verification system with satellite computer as the core is designed,and the specific design of each functional unit is introduced in detail.The high speed serial serdes interface is studied and simulated.The existing high speed multiplex and high capacity storage design is improved,resulting in higher data transfer efficiency,throughput,and storage capacity.Satellite data link protocols and common communication protocols are studied,and the normalized and universal transport layer and application layer protocols are developed.Finally,the system architecture and key technologies are tested and verified.This paper uses some existing research results which have not yet been applied in engineering,and furthermore,realizes a series of technological innovations.A new high performance,modular,reconfigurable,and scalable integrated space electronic system architecture is established.It realizes the integration of satellite management,payload management,high speed and mass storage,high speed multiplexing,and other functions,and realizes the integration of external interface bus and internal backplane bus.The architecture has good compatibility and scalability,and achieves system standardization.On the foundation of onboard reconfiguration of SRAM-based FPGA,onboard reconfiguration of FLASH-based FPGA is realized for the first time.This improves space electronic system's onboard fault recovery,function upgrade and expand capabilities,improves the system's adaptability and reliability.A scalable low speed time division multiplexing interface is developed,which can simplify the signal connection relationship and control logic.The interface can be expanded and configured according to the task requirements.The inter-chip SerDes,inter-board SerDes and inter-device SerDes link for space applications are realized,with characteristics of lightweight,high speed,and low hysteresis.The communication rate can reach 2.5Gbps.The signal integrity of high speed serial link is simulated using dedicated channel simulation software and IBIS-AMI model.A higher performance mass storage is designed,adopting main storage control unit and extended storage array unit architecture.Through 128-bit data bus parallel expansion technology,four-stage pipeline loading technology,and SerDes interface,the performance is greatly improved,with 4Gbps throughput rate,2Tbits storage capacity,and supporting for expansion to 4Tbits.Aiming at the problems existing in the standardization of spacecraft communication protocol,a protocol architecture based on the CCSDS SOIS layering scheme is proposed.Based on the space packet protocol,a general transport layer protocol and application layer protocol are designed.By using these protocols,hardware,firmware,and software IP reuse capabilities can be improved.Through the design and verification of the overall architecture,functional modules,and bus interface,this paper masters the software and hardware design concepts of the space integrated electronic system.The contribution of this paper will provide technical reserves for aerospace missions,promote the development of space integrated electronic technologies,and make them adapt to the electronic technology requirements of future satellites,rockets,and advanced payloads.The research results of this paper can be used for reference in subsequent engineering projects.