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High-speed Serial Bus Decoding And Analysis Software Design Of Broadband Oscilloscope

Posted on:2019-01-20Degree:MasterType:Thesis
Country:ChinaCandidate:X M JiaoFull Text:PDF
GTID:2322330569995591Subject:Engineering
Abstract/Summary:PDF Full Text Request
With the increasing application of high-speed serial bus interface technology,testers rapidly increase the demand for testing high-speed serial signals,and their performance requirements such as bandwidth,sampling rate,and storage depth of test instruments are also increasing.Digital oscilloscopes are the most widely used and most used test instruments in the electronic information field.The decoding and analysis functions of high-speed serial bus protocol signals have become indispensable.At the same time,with the emergence of FPGA + IPC architecture and the application of multi-thread processing technology,the oscilloscope's data operation efficiency has been greatly improved,and the oscilloscope's human-computer interaction interface has become more beautiful and humanized.With the guidance of 20 GSPS digital oscilloscope development project,this paper focuses on the high-speed serial bus protocol decoding and analysis which achieves the software design and implementation of protocol decoding analysis module of the broadband oscilloscope,to achieve serial bus protocols decoding and analysis of JTAG,SATA and PCIe.The specific content is as follows:1.Research on encoding principle of high-speed serial bus protocol and decoding process design.The coding principle of each protocol is studied in depth.Then the decoding process of the corresponding protocol is designed according to the encoding mode and data packet format of each protocol.2.Research on High Speed Serial Bus Protocol Decoding Algorithms.The original protocol data acquired by the oscilloscope is preprocessed to generate a digital serial code stream,which improves the work efficiency of subsequent decoding and analysis;the data descrambling,8B/10 B decoding,the CRC algorithm and the start of frame match algorithm that are needed when decoding the protocols are analyzed and designed.These algorithms are the key to implement the protocol decode analysis module.3.Design and implementation of protocol decoding and analysis module.The overall architecture of the protocol decoding analysis module is divided into an analysis part and a display part.Both parts use the class inheritance structure,extracting the commonality of the protocol and encapsulating it into a base class,and encapsulate unique characteristics of each protocol into a subclass,making the code structure clear and highly reusable.The decoding result is stored in the corresponding List,from which the corresponding data packet type and decoding data are obtained for the display of the decoding label or the event list.Finally,the expected decoding results can be obtained through the protocol decoding analysis module correctly and stably,which proves the correctness of the algorithms and functions implemented in the protocol decoding analysis module.
Keywords/Search Tags:Oscilloscope, High-speed serial bus, Protocol decoding, JTAG, SATA, PCIe
PDF Full Text Request
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