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Research On Low Parasitic Inductance Hybrid Package Structure Of Silicon Carbide Power Module

Posted on:2022-06-20Degree:DoctorType:Dissertation
Country:ChinaCandidate:Z Z HuangFull Text:PDF
GTID:1482306572976009Subject:Electrical engineering
Abstract/Summary:PDF Full Text Request
Compared with silicon-based power semiconductor devices,silicon carbide(Si C)devices have higher switching speed,which can increase the switching frequency of power electronic converters,thereby reducing the volume of passive devices in the system to achieve high power density.The traditional wire bonding packaging structure has large parasitic inductance,which will cause problems such as high voltage overshoot,high switching losses,false switching,and oscillation during high-speed switching of Si C devices.These problems are not conducive to improve the switching frequency of Si C devices.By investigating the state of low parasitic inductance package structures,it's found that hybrid package structure is an effective method to reduce the parasitic inductance of Si C power module.It has the simple fabrication process and multi-layer structure which is easy to optimize the current communication loop.However,the existing hybrid packaging structure has problems such as large parasitic inductance,high junction to case thermal resistance of chips,and insufficient power terminal optimization.Therefore,this paper focuses on these problems and shortcomings of the existing hybrid package structure to carry out the related research.The influences of parasitic inductances at different positions inside the module on the switching waveform and loss of Si C devices are studied at first.Then,the principle of multi-layer communication loop to reduce parasitic inductance is analyzed.Finally,three novel low parasitic inductance hybrid package structures are proposed in this paper.In order to solve the problems of high parasitic inductance,high thermal resistance,and insufficient power terminal optimization of the current stacked DBC hybrid packaging structure,a new chip-embedded stacked DBC hybrid packaging structure has been proposed.The current communication loops of a variety of package structures are analyzed,and the influences of the power module terminal structure on the parasitic inductance and multi-chip parallel current sharing are studied.Then,a stacked DBC hybrid package structure that can effectively reduce the total parasitic inductance is proposed.According to this package structure,a 1200V/120 A multi-chip parallel Si C power module with low parasitic inductance was designed and processed,and the experiment was verified.At the same time,in order to solve the problem that the insertion of coaxial resistance in the double pulse test affects the accuracy of the parasitic inductance measurement in the module,a multi-stage decoupling method is proposed.This method can not only improve the measurement accuracy,but also does not affect the measurement of the module current.In order to facilitate the integration of driving components and passive components of the main circuit,this paper further proposes a hybrid package structure based on DBC+PCB.The influences of the chip layout on the parasitic inductance and the integrated driving components and main power components on the PCB are studied,and a multilayer current communication loop with mutual inductance cancellation is designed.The influence of the structural parameters on the parasitic inductance is further analyzed,and the main-power-loop parasitic inductance of the 1200V/24 A Si C power module designed based on this package structure is reduced to3.38 n H.A method of directly integrating the package module with the main circuit PCB is proposed to eliminate the connection terminals between the power module and the external circuit,which not only helps to reduce the parasitic inductance of the terminals,but also helps to achieve high power density.In addition,based on the double-pulse test circuit,the designed Si C power module and discrete Si C devices were compared.The test results show that the designed power module has higher switching speed,lower voltage stress,and lower switching losses,compared with the discrete Si C device.In order to further reduce the parasitic inductance,a new hybrid package structure by using a flexible PCB with extremely thin layer spacing has been proposed.Four different hybrid package structures are compared.The self-inductance and mutual inductance of the half-bridge unit are analyzed.A package structure that can reduce the parasitic inductances of the power terminal and the current communication loop is proposed.A 1200V/120 A Si C half-bridge power module with less than 1n H parasitic inductance is designed based on the novel packaging structure.According to the bendable characteristics of the flexible PCB,a three-dimensional module structure is designed.In addition,a highly integrated power module which integrates the heat sink,the driver board,and the DC-link side capacitor board is designed.Finally,the low parasitic inductance of the package structure is verified by double pulse testing.
Keywords/Search Tags:SiC power module, Hybrid package, Low parasitic inductance
PDF Full Text Request
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