Design And Implementation Of Embedded Phonetic Lock System Based On DSP

Speaker Recognition has increasingly become a hot spot of research since1960's. It can be applied to a number of fields, such as security, justice, military,finance and many other services. So a great many scientific researchers areinvolved in the research, and they have made great progress. However it is notmature enough. Speaker Recognition (SR), which identifies or verifies people bytheir voices, is regarded as the most natural and convenient one among themethods of biometrics.This thesis concentrates on the application system about SpeakerRecognition research, mainly on the hardware design and the realization ofEmbedded Phonetic Lock based on DSP.The full text is divided into six chapters,the content and accomplished works are as follows:The first chapter introduces the present situation of speech signal processingresearch, elaborated on the SR structure, embedded speech signal processingtechnology and discusses the content researched by this thesis as well as majorwork.The second chapter introduces the embedded lock algorithm principle,including the speech signal preprocess and VAD, analysis the SR algorithmmodel based on the speaker recognition method. In detail elaborates the vectorquantification (VQ) basic principle and the best codebook design.The third Chapter is the key chapter of this article. Introduce the overalldesign of hardware system of embedded phonetic lock. According to the design ,the hardware of the whole embedded lock mainly includes the following units:The signal gathering unit, digital signal processing unit, man-machine interfaceunit, user data store unit, IO interface module, power manage module, printedcircuit board design and ESD protection design.To meet the needs of modem technique and system, the structure of thesystem is designed properly and the devices in the system are selected carefully.nd converting them to digital signals,sign of voice lock,ore, it hasfulfilled the loading process guided by 16bits parallel, which is realized byFLASH under DSP. Then ,it dwells on the introduction the online storagetechnology, adopting outside expand FLASH to store and making voice lockpreserve user information and the threshold value after power off.The fifth chapter introduces the systematic management of powerconsumption. The biggest difference of embedded system from ordinary systemlies in higher demand on the systematic management of power consumption.Moreover, both the cost and the power consumption are considered. The mainhardware of the system consists of DSP (Digital Signal Processor)TMS320VC5416 of TI, CPLD (Complex Programmable Logic Device)ISP2032VE of LATTICE, 39VF400A FLASH of SST, speech ADCTLV320AIC23B of TI. Based on the above hardware, Core arithmetical DSPuses the strengthened type: TMS320VC5416, which has been designed to bequick. The optimized CPU structure, rich internal resources and supports, and thelow power loss pattern make VC5416 especially suitable to embedded systemequipments.Several main functions this system has are as following: (1) gathering voicesignals of the speaker by TLV320AIC23B athen sending them to DSP which can process the digital signal. (2) Compilinginitialization program, voice gathering Program, data transmitting program withVC54x DSP ASM language;recomposing and optimizing speaker identificationprogram and debugging all the software;(3) Microphone reasonable installationhas great influence on identification accuracy, therefore the installation skill hasbeen introduced in embedded voice lock. (4) Using flash SST39VF400A of SSTto store program codes and implementing offline system by "Boot Loader"method.The fourth chapter is completed the software design related to the embeddedhardware of embedded voice lock, the software overall detraining operation, delete operation, identification operation. FurthermThe focus of the chapter is t f power consumption of thedeveloped embedded voice loc ts forward the design schemehe management ok. In addition, it puon the hardware and software of low power consumption. The lock, according tothe design scheme, can work continuously for 100 days with 3 pairs of AAalkaline batteries.Chapter 6, the last chapter, provides a general conclusion as well as thedirection for future research and work.