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Configuration Of Treble-Redundancy Fly-By-Light Control System's Data Bus

Posted on:2012-01-31Degree:MasterType:Thesis
Country:ChinaCandidate:O F GuoFull Text:PDF
GTID:2132330338495984Subject:Control theory and control engineering
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Fly-By-Light Control System is a new generation of control system after Fly-By-wire Control System. At present, with the continuous development of the FBL Control System, the investigation of high reliable FBL Control System goes more important. This thesis studied redundant technique of data bus of FBL control system, determine the required amount of redundancy and monitoring technology, compared systems with treble-redundancy and fourfold-redundancy, then selected to build a configuration a treble-redundancy Fly-By-Light control system's data bus. Submitted the software design of the monitoring algorithm, signal voting, synchronous solution for the system, also made the cross-modal comparative monitoring threshold algorithm used in the choosing principle. Afterward, the thesis analyzed two kind structures of data bus , presented the plan of the configuration of treble-redundancy FBL control system's data bus.Made a comprehensive study on MIL-STD-1773 data bus protocol and the definition of data formats and transmission method were discussed in detail. On the physical layer, the protocol prescribes the requirements of the bus hardware. On the other hand, the protocol gives strict rules on instruction format, transmission and error detection on the data link layer. The article used EDA electronic technology to develop the 1773 protocol chip. Presented the design flow of EDA, and introduced VHDL(Very High Speed Integrated Circuit Hardware Description Language) of which was taken advantage to design the FPGA chip as well as Quartusâ…¡that was the development software. Then, the essay proceeded the overall structure design for the 1773 protocol chip, and submitted general logic diagram of the chip. Designed specific content of modules in the protocol processing unit, provided conditions of states' transition and state charts. Combined with the content of the protocol, researched the control terms of the error management module, and decided adopt the message stack as the way to construct the memory management module. Utilized VHDL language to write the Manchester encoder/decoder that under provisions of the protocol, and processed the simulation and validation.Chose the PCI bus interface chip PCI9054 to develop light preach flight control system interface circuit.Designed the diagram of the signal connection between PCI9054 and FPGA chip.
Keywords/Search Tags:Fly-By-Light, Redudancy technique, 1773 Bus, VHDL, FPGA
PDF Full Text Request
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