Design And Simulation Of Digital Frequency Meter Based On

This paper reviews the development of frequency meter, describes the common method of measuring the frequency and compare the advantages and disadvantages, the selection pulse counting method as a method of this design. In consideration of the program, since the number of internal counter determines the amount of frequency meter away, it is set as a frequency meter counter seven units of measurement. Then explained the principles and structure of the lookup table, and proved that the combinational logic circuit which, if you enter a fixed amount, then the output is relatively fixed principle, analyze the FPGA digital logic implementation principle,carry logic by connecting the plurality of cells, complex The logic can be implemented by FPGA, then using Verilog language design and simulation work done digital frequency meter functional modules and systems.This article also describes the Verilog hardware description language and the Quartus II software is a simple method of operation, in the case of Quartus II software testing simulation with Verilog language is designed to support a frequency range of1Hz~100MHz high-precision digital frequency meter, Preliminary Relative frequency measurement error is less than envisaged make 10-5, for this design has been optimized digital frequency meter, frequency meter reduces visible error and improve the accuracy of frequency measurements, in order within 1Hz ~ 100 MHz frequency range to achieve error of less than 10-5, paper 100 kHz as a dividing point, when the signal frequency is less than the low-frequency 100 kHZ trend, you need to use test week law, and when the measured signal frequency tends to high frequencies greater than 100 kHz, the frequency measurement method using the measurement accuracy more high accuracy.