To Achieve High-speed Digital Signal Processing Hardware Design And Frequency Measurement Algorithm

The basic task of communication signal reconnaissance is to analyze the intercepted signals from the reconnaissance system. The intercepted signals are usually in passive states, with broad bandwidth, multiple modulation modes and signal components. The communication reconnaissance system often uses broadband receiver, with high-speed sampling rate to adapt to different bit-rate and modulation mode; then more complex signal processing methods are implemented in demodulation. Therefore, the signal processing systems used for communication signal reconnaissance not only have to meet the requirement of massive computation, but also require parallel processing capability to ensure the reconnaissance system's real-time performance.Based on the analysis of high speed digital signal processing technology, this thesis presents a scheme for using high performance parallel DSP processors and large capacitance FPGA to design a high speed digital signal processing board, which also has an high speed AD interface, a large capacitance data memory module and a high-speed data transmission module. The board chooses four ADSP TS201S (TigerSHARC),one kind of the most powerful floating-point DSP processors,as its core signal processing module, between which the interconnect communication is implemented both through external port and link ports. In this thesis, the entire hardware design of the high speed digital signal processing board is realized. We also implement the frequency estimation algorithm on FPGA, and propose a new method of function approximation based on FPGA implementation.The main contents of the thesis are presented as follows:1.The key digital signal processing technologies used for communication signal reconnaissance are studied, and consider with the characteristic of high speed digital signal processing technology, the scheme of the high speed digital signal processing board is designed.2.The hardware design for the board is discussed detailed and deeply, including four DSPs, AD, USB interface, FPGA, and much more about board-level logic circuit design. In addition, schematic diagram design and PCB layout design are involved in the hardware design.3.The hardware debugging and test is implemented in the end of hardware design, and the performance of the design meets with the need of the system.4.The frequency estimation algorithms are discussed, and these algorithms are implemented on FPGA. A new method of function approximation which suits for implementing on FPGA is proposed.