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Research On FPGA-Based ASIC For Inverters

Posted on:2006-10-25Degree:MasterType:Thesis
Country:ChinaCandidate:X LuoFull Text:PDF
GTID:2132360182469729Subject:Power electronics and electric drive
Abstract/Summary:PDF Full Text Request
The inventer controller composed by separated analog devices before has developed into analog-digital or full digital controller based on microprocessor (DSP/MCU). But the microprocessor in common use is designed for general purpose , it is sure to have certain limitations. In past few years ,the research on realization technology of Application Specific Integreted Circuit ( ASIC) for inverter controller has got more and more solicitude, and have become the new research direction of inventer controller. This paper has used a mature model of single-phase voltage source PWM inverter to realize the ASIC for inverter controller . We have carried out preliminary research on systematic function partition, hardware algorithm, whole systematic hardware design and optimization, pipeline technology, and operation stability of the chip,etc. Firstly, the continuous and discrete mathematical models of a single-phase voltage source PWM inverter are established, the design method based on pole-assignment is used for design of inverter voltage and current dual-loop controller. At the same time, simulation and experimental have been given, which indicates that inverter systems provides fast dynamic response and nice static characteristics. And then, structure and the feature of FPGA device have been introduced. On the basis of chip application goal being given, we have analyzed the selecting principle and specifications of FPGA,as well as the related develop environment and tool. Then systematically elaborated the design methodology of complex FPGA design. The design process of ASIC in detail haven been introduced too. Both the development process of using the Quartus II only and the development process that combines using with Modelsim, Synplify Pro and Quartus II. have been introduced summarily. On this foundation, we have carried out the hardware algorithm/control unit such as chip systematic function partition,DDS standard sine wave generator, voltage current double-loop controller algorithm unit, PI hardware algorithm unit, SPWM producing unit, triangle wave occurs unit and the control unit of dead band, etc. Their hardware algorithm have been studied .We have completed the modular design. Haven analyzed the model and the structure of digital phase-locked loop (DPLL), we designed a new high accuracy DPLL application in inverter which use proportion integral (PI) method replacing traditional filter, use phase accumulator realize the function of digital control oscillator ( DCO). The high speed advantage of FPGA's operation is made hard to demonstrate for the inconsequence in structural arrangement. The pipeline technology had well solved this problem. We presents a new pipeline optimization technology of inventer's control system based on FPGA,and completed the optimization design of the inventer controller. Analyzed the design process in detail and offered a kind of thought for the people who devoted to FPGA's application in power electronic field.The simulative and experimental results verified the correctness. Finally, this paper has pointed out "race and hazard" as well as "metastability" problem, analyzed producing mechanism, and given some general solution measures.
Keywords/Search Tags:inverter, FPGA, ASIC, hardware algorithm, pipeline technology, design and optimization, stability
PDF Full Text Request
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