IP Core Design Of Ehernet MAC Controller

The IP core design of Ethernet MAC (Media Access Control) controller based on IEEE802.3 is mainly described in this dissertation.In this paper, the background of this project and the protocol of Ethernet (IEEE802.3) are introduced first. The master plan, including the architecture of the system, the module dividing, the design method and the coding style is expatiated Secondly. Finally, the detail of each module with testing data results and the timing simulation waveform is explained. And the author points out it is a good method to apply IEEE1588 protocol and IEEE802.3 protocol to resolve the problem of real time about industry Ethernet.Solutions to the key functional modules of MAC layer are given, such as rx_mac module, tx_mac module, mac_control and interface between PHY/MAC and host, arithmetic for CRC, CSMA/CD and HASH Table etc. It is well known that the most important process in system designing is how to define each module and how to coordinate and interconnect these modules. According to the TOP-DOWN method, interconnection of each module and the interface signals are also defined to communicate between each other, while the internal timing of the module is controlled by finite state machine. In the down level, verilog hardware description language is used to describe the base circuits. It should be pay more attention to hardware resource spending and concurrent executable ability of the Verilog Language, which could make the design closed to the hardware working way.In conclusion, the final goal of this paper is to successfully scheme out an available and reused IP core of Ethernet MAC controller.