Research On Control System For NPC Three-level Inverter And SVPWM Based FPGA

Recent years, multilevel inverter has been widely used in power electronics, there is more and more study on its control strategies and the topology of its power circuit. In comparison to two-level inverter, it has some advantages as following: 1.Mutillevel inverter reduce the di/dt and the dv/dt on switches; 2.At a same frequency, a multilevel inverter's output has a better waveform than that of a two-level one; 3.Mutillevel inverter can have higher voltage with the increasing of the number of its levels.As levels increasing of inverters, the space vector modulation (SVPWM) of multi-level inverters is complex more and more. Based the intrinsic relationship between SVPWMs for two-level inverters and three-level inverters, a novel SVPWM control algorithm is proposed for three-level in this paper. The dwell time of voltage vector for three-level inverter can be acquired from dwell time of voltage vector for two-level inverterby using a linear transition.At last, the proposed algorithm is verified on prototype in laboratory based FPGA and MOSFET. The simulation and experimental results show that the algorithm is verified and it can be extended more level inverter easily.