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Research On The Application Of SOPC Technology In Diesel On-line Condition Monitoring And Fault Diagnosis Apparatus

Posted on:2009-05-31Degree:MasterType:Thesis
Country:ChinaCandidate:L LiFull Text:PDF
GTID:2132360245455053Subject:Marine Engineering
Abstract/Summary:PDF Full Text Request
Diesel engines are widely used as power-supply equipment in industry, agriculture, military, architecture, transportation and so on. To make sure diesel working in good condition is very important to enhance system's safety, cut down cost, save energy as well as protect environment. Therefore, an on-line condition mon itoring and fault diagnosis apparatus is urgently required in diesel daily running in order to maintain effectively by operator.After analyzing present diesel condition monitor apparatus, a design of on-line condition monitoring and fault diagnosis apparatus based on system on programmable chip (SOPC) technology was researched and developed in the paper. SOPC is an on-chip programmable technology applied in embedded system which is developed in recent years. The technology implements microprocessor and other peripherals in field programmable gate array (FPGA), so the SOPC system has not only plenteous software and hardware resource in microprocessor system, but also programmable hardware logic resource in FPGA system. Therefore, SOPC technology is considered as a trend of embedded system. The paper has done some research on diesel monitoring and diagnoses system based on SOPC technology. The design has many advantages, such as smaller volume, lower power consumption, higher reliability, lower cost, strong expansibility, good software and hardware upgrade ability.The paper has accomplished the following work:1. System design of SOPC. The paper analyzed the requirement, then designed system's hardware and built a SOPC system based on Altera corporation's Nios II processor.2. IP core design. According to the analog to digital converter (ADC) data interface, the paper implemented ADC interface IP core, which realized the data acquisition triggered exteriorly with high precision. According to the speed requirement of finite impulse response (FIR) filter and fast fourier transform (FFT), the paper implemented FIR IP core and FFT IP core by hardware, then packed them as a module, which can be reused. Testing result showed that hardware acceleration contributed a lot to system's performance.3. Software design. The paper analyzed the Nios II soft structure, then designed the on-chip peripheral's driver and off-chip device's driver. By studying ,μC/OS-II real time operation system, the paper devised the application program based onμC/OS-II in order to meet the requirement of complex control and communication.
Keywords/Search Tags:system on programmable chip (SOPC), fault diagnose, field programmable gate array (FPGA), IP Core
PDF Full Text Request
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