Research Of Intelligent Identification Of Induction Motor Based On Stochastic Arithmetic

With the development of power electronics, VLSI and computer control technology, high performance ac motor drive system had made great progress in recent years. The speed sensorless Vector control technology of induction motor, being one of the important research direction of ac drive, had gradually become the research hotspot. With the advantages of simple structure,parallel computing and self-learning ability, the neural network had been applied to estimate the induction motor speed.However,the hardware implementation of neural network was difficult because of its parallel computing and nonlinear activation function, which restrained the practical technology. The speed estimation of inductor motor using neural network was studied and the hardware implementation of neural network are discussed in this dissertation.This paper presentd the current speed estimation methods, generalized their respective characteristic and gave some analysis. The theory foundation of induction motor vector control was introduced, and its system model was built based on the described vector control principle. The speed estimator was designed based on neural network,which define the voltage model as the reference model and the current model as the adjustable model.,the weights of the NN were adjusted online using Back Propagation algorithm.The speed sensorless vector control system based on BP was built and analyzed The simulation results shows that the speed estimator of neural network can accurately estimate the real speed.According to state machine theory, the paper had done some preliminary discussion and study on the stochastic arithmetic realization of the Sigmoid function in the neural network. The digital logic implemention of Sigmoid function was given,and then the software was designed in hardware description language VHDL.The simulations based on the platform(Modelsim) were carried out.Using this method,the program can be modified anytime,the design period can be shorten greatly and the hardware resources can be saved significantly,which meets the neural network VLSI requirements well.