The Research On Hardware Scheme Of Electronic Transformer Digital Interface Based On IEC61850

Recently, with the expansion of power grid and the rising of voltage level, traditional substation automation technology has been unable to satisfy with the digital and intelligent development needs of power grid. Then the establishing and extending of digital substation which is based on IEC61850 standards will be an inevitalbe trend. Researching electronic transformer and its digital interface-MU(Merging Unit) in digital substation process layer will be of great significance and engineering value.MU is a digital interface which is used to link electronic transformer of process layer and protection supervisory equipment of bay layer. MU's main function is to sample voltage and current synchronously together with electronic transformer, and to frame and transmit the sampled data in accordance with IEC61850-9-1/2 standard. The use of MU can greatly simplify hardware structure of secondary protection supervisory device. The MU can also be helpful to realize the protection and measurement data sharing in substation, to implement the integration with SCADA system.In this paper, the basic principle and system structure of electronic transformer is introduced firstly. After analyzing and comparing IEC60044-7/8 standards and IEC61850-9-1/2 standards, IEC61850-9-1/2 standards are choosen to be the MU design basis. Secondly, based on the comparison of several typical MU design schemes and function models, three synchronous sampling schemes of Mu are analyzed detailedly, including sencond pulse method, IRIG-B code method and IEEE 1588 protocol method. Then, the hardware design scheme and software funtion of MU in bay layer is proposed. In this scheme, MU is based on ADSP & FPGA structure, then the programmable, multi-I/O port advantages of FPGA and the high-speed data processing ability of ADSP can be made full use of. In this kind of MU, decoding and checking function of data frame sampled by electronic transformer can be completed, the sampling synchronizaiton of MU can be finished, the FIFO sequencing, digital filtering, resampling and Ethernet framing fuction can also be accomplished. In this paper, according to different function, MU is divided into power plug-in, backplane, opend into and out plug-in, data receiving and processing plug-in, synchronization and data output plug-in. Finally, the hardware design schemes of data receiving and processing plug-in, synchronization and data output plug-in are amply designed.