Fault Recorder Design Based On High Performance Dsp

With the voltage level and capacity increasing gradually of the power system grid ,economic loss caused by system failure is growing also. Fault processing is not only to recovery transmission line operation after resection and reclosing but also sample and record fault information to analyze the operating state feature of power system failures on pre and post,which will pay a very important significance for fault prevention and clearing timely in future.This article based on requests of DL/T553-1999 " The Technical Specification of Dynamic Fault Recording for 220 kV～500 kV Power System ",combined with the current development of fault recorder at home and abroad,according to solve performance and functional deficiencies due to structure design limitations of current fault recorder, we design and develop a new fault recorder as the core of high-performance DSP (TMS320C6713) and propose to a modular design theory as CPLD controls data sampling, DSP for processing, ARM achieves communication. This paper includes the hardware and some software process design for three modules above, as follows:On aspect of hardware, according to sampling, handling, storage and sending process of fault data in analog and switch values, we have an exhaustive description respectively on selection basis, principle, features and circuit design for CPLD chip in sampling module, DSP chip in data processing module and ARM chip in communication module as well as important peripheral circuits component around them.On aspect of software, combinate with hardware circuit design, we introduce the core chip's flow chart form design for achieving features, list out part of the program code, have a brief description of the fualt recorder algorithm show to fault start identification, fault type identification and fault location.At last, present a communications program to transfer COMTRADE format file on basis of the application of IEC61850 standard file transfer recorded data model.This device designed to collect 128 analog and 128 binary at maximum and 256 points every frequency(50Hz)with 16 bits A / D conversion precision. Independent modular design could improve equipment reliability to meet performance and reliability requirements in the development of power system and a strong foresight.