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Research And Design Of MCU IP Core Based On FPGA

Posted on:2009-06-18Degree:MasterType:Thesis
Country:ChinaCandidate:J F GongFull Text:PDF
GTID:2178360272463556Subject:Systems Engineering
Abstract/Summary:PDF Full Text Request
IP core reuse technology is the technical core of SOC design.It leads to simple chip design,short time to market,as well as less failure risk.8-bit MCU IP core is one of the most popular embedded cores in SOC design. Micro-Controller Unit(MCU) is the key component of many digital systems. To successfully design a MCU with our own intellectual property is not only with great challenge but also our pursuing ideal and goal because MCU is very complicated in structure and calls for high requirement in such aspects as area,speed,power consumption and function.The subject of this thesis is just a helpful try and practice with this methodology.Based on complete and careful analysis of system architecture, instruction set and system time sequence of Microchip's PIC18LF4550,this thesis gives the principle of function and the architecture design measures. The core is partitioned into two parts which are control units and data-path units,and makes up of several function modules which are elaborately designed.Through using one clock instead of the original four clock technology,the clock structure is improved.Cooperating the instruction work step,the new clock structure executed one clock cycle per instruction.So the clock frequency of the improving MCU is almost four times higher than the highest frequency of PIC 18LF4550.This MCU is designed in the way from top to down and described by using VHDL hardware design language to realize RTL coding of each module.The design was carried out by using Attera's Quartusâ…¡software, optimized and validated through the processes of simulation,synthesis and PAR.Lastly,the effect of instruction function was tested.
Keywords/Search Tags:IP core, MCU, FPGA, VHDL
PDF Full Text Request
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