System Of JPEG Image Compression Code Based On SOPC Technology

The JPEG(Joint Photographic Experts Group) is a international standard of static state image compression technology.Its characteristic is high rate of compression,low visible distortion and easily algorithmic realization.Nowadays,The standard of JPEG has been applied in a great deal of field.Along with the incessant development of multimedia technology and the embedded system,The contact of the static state image compression technology and the hardware has been more and more close.According to the direction,this paper combine JPEG compression code technology and the SOPC technology which is paid lots of attention.And we design a JPEG compression code system that is based on Nios embedded processor.SOPC(System On Programmable chip) technology is the latest embedded system technology.It's rapid developing accompanying the developing of the Programmable Logic Device.It has the characteristic of the flexible designing style,ideal software developing model and abundance IP core.The characteristic of refresh configuring has made a new mode of designing embedded system.The Nios which has been introduced in our system is the Altera's present for SOPC. It is loaded by FPGA(Field Programmable Gate Array) to implement a integrated embedded system.The research of this paper is implement the JPEG algorithm to the Nios embedded system.And the paper chiefly contains these aspect: firstly,the paper introduce the theory of JPEG,including DCT(Discrete Cosine Transform),quantization and entropy code. Secondly we whole introduce the SOPC technology. Finally,we design hardware and software for the system.The hardware project include the board of embedded system,the Nios hardware system construction and the realization of the programmble system.The software project chiefly include the implement of each JPEG algorithm module.And we do improvement for parts of algorithm to fit to design. Finally,we test the system in the Nios IDE.