Font Size: a A A

Design Of The FFT Processor Based On All-Digital OFDM Receiver

Posted on:2009-04-07Degree:MasterType:Thesis
Country:ChinaCandidate:S J WangFull Text:PDF
GTID:2178360272484628Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
FFT(Fast Fourier Transform) is the core technique of DSP(Digital Signal Processing). With the rapid development of electronic technology, FFT has been widely used in areas of multimedia, communication, image processing. OFDM(Orthogonal Frequency Division Multiplexing) is a high-speed transaction technology which can defeat ICI(Inter-Channel Interference) and ISI(Inter-symbol Interference). OFDM has been the first choice in 4G mobile communication technology. In OFDM receiver system, FFT is used to modulate the sub-carriers. FFT is the most complex and difficult part in the OFDM system, thus its processing speed and area are extremely important for the whole OFDM system. Because all of above, the FFT Processor based on all-digital OFDM receiver has been very popular. Recently the development of VLSI(Very Large Scale Integration) and DSP supply the hardware foundation for the FFT Processor based on all-digital OFDM receiver.The paper mainly discusses the design of the FFT Processor based on all-digital OFDM Receiver. It introduces the status quo of development of FFT Processor and basic theory of OFDM system. It discusses the theoretical foundation of digital signal processing and principle of FFT, including some kinds of algorithm, the hardware implementation architecture.Most importantly, it select the DIT(Decimation In Time) radix-2 algorithm array structure to design the FFT Processor. It elaborates the multiplier and adder, especially the multiplier is discussed. It also discuss the hardware implementation of cascade structure and function modules. The FFT butterfly computing unit is designed by Booth pipeline structure. So it can reduce the complexity and increase the speed of the butterfly unit. After function simulation, with TSMC 0.18μrn CMOS technology, it makes the logical synthesis and the layout design. It also analyses the area, power and timing reports.The design uses the software such as Matlab, Modelsim, Quartus II, Synplify, Design Compiler, Encounter, etc. It finished algorithm verification, RTL coding, function simulation, logical synthesis, layout design.
Keywords/Search Tags:FFT, OFDM, butterfly calculate, Booth algorithm, pipeline
PDF Full Text Request
Related items