Research On Verification Of Embedded SDRAM Controller

The external SDRAM devices connected to the network processor are used to store large data structures or hold the instruction code of the host during runtime. Generally, the SDRAM controller is used to control the access from the internal devices of the network processor to the external SDRAM devices. It is necessary to verify the function of the SDRAM controller which has complex sequential operation because only a slight mistake may lead to network processor does not work normally.The functional features of the SDRAM controller are extracted based on the specification. Using open verification library, 30 assertion modules based on the functional features are designed to monitor the sequential behaviors of the SDRAM controller. If the behaviors do not correspond with the description in the assertions, the violation reports are issued immediately. The verification platform consists of virtual system, SDRAM controller and virtual SDRAM devices. The virtual system is used to simulate the behaviors of the system to issue reasonable addresses, data and commands to the SDRAM controller. The virtual SDRAM devices which are used to monitor the simulation process can print the corresponding messages based on the signals issued by the SDRAM controller.After the assertion modules were added into the verification platform, the verification is executed and the coverage reports, the assertion violation reports, the simulation waveforms and the messages printed by virtual SDRAM devices are obtained. The number of the assertion violation reports is reduced to 0 after the modification of the design and the optimization of the assertions ensures that the module functions of the control and command are correct as well as the messages printed by the virtual SDRAM devices and the simulation waveforms ensure that the module function of the data path is also correct. The code coverage is relatively high and meets the demands of the functional verification of the SDRAM controller.