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The Design Of Universal Flash Memory Controller

Posted on:2010-06-21Degree:MasterType:Thesis
Country:ChinaCandidate:J X DongFull Text:PDF
GTID:2178360332957896Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Flash memory is a kind of memory which can retain data without electricity, it can keep data for a long time. Only one flotox MOSFET is used in flash memory's uint, it is similar to EPROM. Flash memory is a sort of memory which can be programed and erased by electricity. Flash memory's structure is simple and it can be programmed more stable. The speed of flash memory's read operation is high, it is easy to be programed and erased and it's power is small. It has been used in a lot of electronics. U card, SM card and SD card are important electronics which are composed of flash memory. Presently, flash memory is used in many embedded electronics. Many companies produce several types of flash memory, and their interfaces are similar. So It is valuable to research universal flash memory controller.Clock divider module, BCH decoder module, register controller module, main controller module, serial and parallel NAND flash memory controller module and AMD NOR flash memory controller module are included in my design of universal flash memory controller. This design supports serial and parallel NAND flash memory and AMD NOR flash memory, users can control this design by program data into the programmable registers in the design. This design supports 8 bits and 16bits data channel flash memory. This design uses BCH code to check and correct error and it can correct one error in 8 bits channel and two errors in 16 bits channel. The clock frequency of the design can be controlled by clock divider to meet serial NAND flash memory's clock frequency of different companies and the design can work more stable by decreasing the clock.The IP of universal flash memory controller is debugged in CycloneII FPGA borad, it can read, write and erase SAMSUNG parallel NAND flash memory which is in the FPGA borad, so the IP is correct.
Keywords/Search Tags:NAND, NOR, Flash memory controller, BCH code, FPGA
PDF Full Text Request
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