For Electronic Ballasts The Spic The Power Factor Correction Technology

Major:Microelectronics and Solid-state ElectronicsTopic:Research of Power Factor Correction Technology for ElectronicBallast SPIC (Smart Power Integrated Circuits)Master抯 degree candidate: Liu YiAdvisor: Prof. Chen XingbiIn this paper, the research and development on SPICs are reviewed briefly,and also the Power Factor Correction technology is discussed. The principle of application of Active Power Factor Correction (APFC) Technology for Electronic Ballast is analyzed in details. A CMOS circuit of SPIC is described. The design and simulation of the circuit, which is designed to drive a power MOSFET with a 500V breakdown voltage and maximum IA operation current, is implemented. The circuit can be used as a pre-regulator for Electronic Ballast. The IC solution also provides a voltage-regulator with the functions such as undervoltage lockout, and overvoltage protection. It improves the efficiency of utilization of power, and the corrected power factor increases to over 0.95 in theory.The whole circuit consists of a multiplier, an error amplifier, a comparator, a RS flip-flop, an And gate, and an inverter, etc.. The electronic circuit simulator Cadence is utilized to practice the detailed functional simulation of the general circuit and the subsystem circuits. The design of layout and process based on the parameters of the circuit is presented. In the end of this paper, some of the test results, which have been demonstrated to coincide with the simulation very well, are given.