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New 1/100s Timer Hardware Description And The Front-end Design

Posted on:2006-12-15Degree:MasterType:Thesis
Country:ChinaCandidate:J L YaoFull Text:PDF
GTID:2192360155466847Subject:Electronics and Communications Engineering
Abstract/Summary:PDF Full Text Request
A precise calculargraph is usually applied to any technical fields as athletic competition that demands accuratetiming. Usually, the design of precise calculargraph can be maded by using mediate scale integrate circuit. The study which is based on the new hardware description language and adapts the design method of ASIC will realize the advanced design of calculargraph whose accuracy will be 1/100s. This calculargraph, including keyin module,clock frequency division module, switching and controlling module, display module, can realize the function exercised by accurate calculargraph of 1/100s.This passage discusses input and output signals of various modules and their corresponding relations,and it also describes each module by using hardware description language and make RTL imitation. It has rich contents, reliable datum, and high operability.The key-in module will produce reset0 and on-off 0 . Clock frequency division is actually a frequency division circuit divided by a calculator. When divided lOtimes 1 KHZ clock signal will result in clock's 100HZ clock pulse signal and redivided 4 time s it will result in 25hz.The controlling sub-module is used to control whether enable the calculating signal according to the calculator's working status The calculating sub-module is a calculating timer, used to display 8-figure calculating information when the enable signal starts calculating effectively. The input signal of calculargraph display module is the calculating information it outputs, with theoutput signal choose and segment, driving the eight LED 7-section display digital tube used for calculating display. When it outputs signals ,the LED 7-section display digital tube will be highlig hted in circles to display the calculating output because of the 8-figure display's calcul ating in circles.When describing all function modules' hardwares , a programming software plat form QuartusII will be developed. Its logical function emulation and time sequence will be tested, integrated into specific device and adapted.
Keywords/Search Tags:calculargraph, hardwar description language, integrate circuit design, EDA, imitation
PDF Full Text Request
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