Design And Implementation Of Tcr-svc Controller Based On Dsp

As the increase of impact and imbalanced loads, there are many serious problems of power quality in the power system, such as voltage fluctuation and flicker, three-phase imbalance, so dynamic var compensation of load end is quite important. TCR-SVC is an effective measure to increase power system stable level and reduce electrical energy loss, so it has become a hotspot in recent years. However, the TCR used now has many problems, such as poor balance capacity, low response speed and weak anti-interference. In view of these problems, the paper designs and implements a SVC controller model, which uses admittance compensation algorithm based on average power and applies thyristor photoelectric firing technology. The experimental results demonstrate the model has fast response and trigger pulses have strong anti-interference.First of all, the paper researches the working theory of TCR. Moreover, using admittance compensation algorithm based on average power, the SVC controller is researched via simulation. The simulation results prove that the controller using this compensation algorithm can balance three-phase loads and improve the power factor. Finally, based on the load of electric arc furnace, this paper develops a SVC controller model.DSP and CPLD are the cores of the controller, including signal detection circuits, external driver circuits, thyristor digital trigger and photoelectric conversion circuits.Thyristor digital trigger is designed by VHDL Software code of DSP algorithm is programmed by C code.Performance test results of hardware and software show that TCR-SVC controller based on DSP, designed in this thesis, has the following features:calculation of compensation admittance and trigger angle is fast and accurate; the trigger pulse of CPLD output has good synchronization, fast response, good precision, good stability and easy debugging; gotten by photoelectric firing manner, thyristor trigger pulse has steep rising-edge, weak dispersion, and strong anti-interference. These advantages make thyristors in series triggered reliably and synchronously and reduce the error trigger rate of thyristors.