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Design And Implementation Of The Communications System In The Hdlc Protocol Based On The Pci Bus

Posted on:2003-01-14Degree:MasterType:Thesis
Country:ChinaCandidate:F Q CengFull Text:PDF
GTID:2208360065451053Subject:Control theory and control engineering
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It's a part of the reorganizational synthesis terminal device about the South-West Institute of Electronic Technology of China pre-researching project what the dissertation researched, in order to achieve the interface with PCI bus, realize the four-channel HDLC data transmission.We related to the partial norm of PCI bus from the system-designed aspect in the dissertation, and the PCI bus' principle in the mass. It's an emphasis to depict the S5933 chip used currently more widely which is used to realize the PCI bus protocol, and explain the S5933's Pass-thru transmission mode relating with the project research, which is a kind of typical working mode. To master PCI bus' principle is vital to understand PCI bus configuration mechanism. In the dissertation, what we depict much more are how to map the device memory space to a system space or I/O space, and determine the size of the space-mapped, To understand this part, it helps us write a device driver about the PCI bus' circuit.In the hardware design part, we depicted mainly the process how to realize the system's interface with the PCI bus, HDLC chip, and a dual-port RAM. Designing the system logic control circuit, we utilize the MAX+plus II of Altera Corporation as an EDA tool, and the description language used is Verilog HDL,whose powerful function consists in describing gated-level on-off circuits. In addition, for the system logic circuit design, we describe control function modules by combining with logic circuits and HDL, and carry out further the function and timing simulation of circuits and the synthesis simulation of all control circuits' modules.For the software design part, the software development condition is made up of VC++6.0,DriverStudio, DDK, and Windows NT4.0.In the Windows NT condition, a user cannot directly access the system's hardware resource, which is different from the DOS condition does directly. In this part, we analyzed the basic system structure of a device driver and the relationship with an application program, and depicted that how to invoke a device driver in the application program.So far, we have accomplished successfully the four-channel HDLC communicationIIcard basing on PCI bus, debuged a channel, and developed a device driver for the hardware, setup.exe program of it, and the DLL, which is used to implement the invocation of the driver's interfaces. The successful development of the project may be used to the fields of the reorganizational synthesis terminal, telemeter, telecontrol, and so on.
Keywords/Search Tags:PCI bus, FPGA, HDLC
PDF Full Text Request
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