Spi-4.2 And Spi-3 Protocol Bridge On Fpga

With the coming of 10G telecommunication age,SPI-3(System Packet Interface,Level 3) and SPI-4.2(System Packet Interface,Level 4 Phase 2) are applied more frequently on different telecom systems.System Packet Interface,Level 3,(SPI-3) provides a link-layer interface for transferring packets at the Optical Carrier 48 data rate(2488.32 Mb/s) while System Packet Interface,Level 4 Phase 2,(SPI-4.2) provides a link-layer interface for transferring packets at the Optical Carrier 192 data rate(9953.28Mb/s).In many communication applications,a bridge between two systems supporting different interfaces(for example,SPI-3 and SPI-4.2) is required.A typical ASIC(Application Specific Integrated Circuit) solution is 88P8344BHGI produced by IDT.However,all the ASIC solutions have the same disadvantage - the product could not be changed according to the user's specific application.With the rapid progress of the semiconductor process,the cost of FPGA(Field Programmable Gate Array) is reduced hugely these years.FPGA becomes a great benefit for the bridge design because of its flexibility.This paper presents a reference design to bridge one,four-channel Xilinx SPI-4.2(PL4) core to four,single-channel SPI-3 Link Layer cores (v4.1) in a Virtex-4 device.Analysis is also made to compare various interface implementations of SPI-4.2 using Xilinx FPGA.FPGA advantages are further utilized in order to design a low cost,high performance bridge. The flexibility of the FPGA device enables the designer to modify the design according to his/her specific application,such as expanding the design to a bridge between four SPI-4.2 and sixteen SPI-3 interfaces.