Design Of Virtual Logic Analyzer Based On FPGA

With the development of LSI and micro-computer, the digital instruments become more and more intelligent. Many problems are caused during designing or debugging the digital system, which include the transmission delay, the competition risk, the interference of burrs and so on. They can not be resolved by traditional instruments. In this situation, a new type of digital domain testing instrument named logic analyzer is made to analyze hardware and software, which can effectively solve these problems caused in the digital system.The logic analyzer plays a big part in debugging of system, but the cost of the equipment is prohibitive which limits the scope of the market. This thesis has designed the virtual logic analyzer based on FPGA to let more users use it, which bases on researching virtual instrument technology, FPGA technology and USB interface. Virtual instrument technology is the product of combining computer technology, sensor technology, digital processing technology with others, which takes full advantage of resources of computers'hardware and software and breaks the limitation on these aspects including data processing, storage and so on, so it is the trend of the development of morden instruments. An FPGA chip contains a large amount of logic gates and I/O resources, which uses its reconstruction of the online system to realize logic function needed by users. The interface of the system is the USB interface, which has much virtue such as plug and play, fast transmission speed, good currency capability and so on. It accords with the developmental trend of modern instruments that the USB interface is applied to the design of virtual logic analyzers. This system design of virtual logic analyzer combines virtual instrument technology with FPGA technology, which highlights the advantage of applying new technologies in intelligent instruments. The cost of the virtual logic analyzer is a tenth of the traditional logic analyzer, and it is a practical digital test instrument.The system adopts the design plan of "PC+USB+FPGA", which includes hardware design and software design. Hardware system is designed by Verilog HDL, which consists of the module of detecting burr, trigger module in recognizing, trigger module in generating, trigger module in controlling, control module in storing, USB module in controlling and so on to achieve the function of collecting and storing data. The software design includes application interface designed by LabVIEW, driver design, the design of firmware program and standardization of communication protocol. The virtual logic analyzer can detect ten signals at the same time. The function of virtual logic analyzer can meet the needs of teaching by being tested in the lab, which has certain practical and extended vista.