The Design And Research Of A Low-power Motor Control Chip Based On FPGA

Coordinate transformation method is used to establish the mathematical model of permanent magnet synchronous motor (PMSM) under two-phase rotating d-q coordinate system and a PMSM vector control program and space vector pulse width modulation (SVPWM) are given. On this basis, using the "top-down" design method, chip planning of PMSM control chip based on programmable logic gate (FPGA) is completed:the current loop hardware circuit is designed using on-chip logic elements (LEs), the speed loop PI regulator algorithm is achieved by software on NIOS II processor.The FPGA low power design technology is introduced in this paper, and then by using the algorithm structure level and register transfer level power optimization techniques, power consumption of the chip hardware design is optimized with hardware description language VHDL and schematic diagram of a combination of input methods under QuartusII tools. The PowerPlay power Analyzer tool is used to complete power estimation and analysis.A improved coordinate rotation digital calculation (CORDIC) algorithm, a combination of Look-up table method and the traditional CORDIC algorithm is proposed to solve the overmuch pipeline stages problem of the conventional CORDIC algorithm, and the power consumption of CORDIC IP core reduces by28.5%; A SVPWM implementation based on the modulation function is adopted to make the power consumption of SVPWM IP core reduce by55.53%; clock gating technology based on IP core is used to manage the clock signal of sub-circuits in hardware to reduce invalid flip of the sub-circuit signals, and this reduces power consumption of the whole hardware by17.87%.On NIOS II IDE development tools, the software including main program, the timer interrupt service routine and PI regulator algorithm program in the speed loop, is compiled, to complete the chip software design. With hardware design, a fully functional system on Programmable Chip (SOPC) is constructed. Ultimately, a FPGA-based PMSM control chip, whose hardware dynamic power is only58.47mW is completed.Based on the above chip, the PMSM speed control system experiment is carried out.