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Design Of Metro Automatic Ticket Machine System Based On FPGA

Posted on:2014-02-14Degree:MasterType:Thesis
Country:ChinaCandidate:Q W ZhaoFull Text:PDF
GTID:2252330425980932Subject:Signal and Information Processing
Abstract/Summary:PDF Full Text Request
With the progress of society, the improvement of people’s living standards andthe rapid development of the city, people’s travel is also becoming more and morefrequent, the subway as an important and convenient travel of city transport is moreand more people choose and acceptance. At the same time, the urban rail traffic,asone of the important means of transport in the development of city, in whichautomatic fare collection system has played a key role, while the ticket vendingmachine is more complex equipment in the terminal equipment of the automatic farecollection system. The ticket vending machine aims to achieve the passengers buffettickets, thus avoiding the time delay due to queuing phenomenon, as well as costsavings to the subway operators and avoid unnecessary trouble caused due to theerrors of manual.This paper is combined with the actual subway station in the urban rail transitpassenger demand in the ticketing process and through the actual investigation andanalysis, the proposed use of FPGA chip as a master unit, designed a subway ticketvending machine system. The design of the whole system is completely starting fromthe passenger’s point of view, the operation is simple and quick, flexible andpractical, security and stability higher, to complete the basic process of the entireticketing management. At first, this paper studies the developmnet situation of theticket vending machines domestic and abroad, completed the USB interface andRS232interface with the communication protocol between the FPGA configurationin the design process. At the same time, using the Quartus II9.0development tool bymeans of principle diagram input way, achieve to votes module,coin cumulativemodule, fares cumulative module,comparison of module,the margin calculationmodule and hexadecimal conversion module of digital circuit design. Then usingVHDL language to its software ticket selection module, coin processing module, thebalance calculation module and display function module four parts to carry on the design and make simulation.At last, through the system debugging and the corresponding modulefunction simulation, to verify the whole system principle and the design scheme ofthe correctness, feasibility. The overall program is simple, efficient and low cost,suitable for the current development of China, have fast popularization and practicalsignificance in today’s China.
Keywords/Search Tags:FPGA, Automatic ticketing system, Rail transit, VHDL, QuartusII
PDF Full Text Request
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