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High Pressure Common Rail Diesel ECU Based On The Underlying FPGA Driven Research

Posted on:2014-08-05Degree:MasterType:Thesis
Country:ChinaCandidate:B WangFull Text:PDF
GTID:2262330401973196Subject:Vehicle Engineering
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With the fast development of modern automotive electronic technology, people demand for better performance of all aspects of diesel engine, which is embodied in strong motive power, low fuel consumption, low emission, low noise and energy saving. Therefore, the ECU (Electronic Control System) of diesel engine should be improved constantly so as to possess high fuel inject precision, high flexible control degree of freedom and rapid response ability. In order to achieve desired targets, good control strategy is not the only one we need, the efficient and reliable low-level driver with strong real-time for ECU is also crucially important. As the basis of all control functions on ECU, real-time and reliability of low-level driver is closely related with the engine performance. At present, the ECU low level driver is aimed at a specific engine and specific single chip microcomputer to develop. So, when the engine or single chip microcomputer changes new development work should be carried out, which cause a lot of limitations on the development cost and cycle. In consequence, research related to low-level driver is an important link of ECU development work.FPGA is the field programmable gate array, which is a semi custom circuit. Through it, the custom logic function can be realized by programming. The emergence of the FPGA solved the lack of custom circuits and overcame original programmable device’s shortcoming that the number of gate circuits is limited. The development cost is reduced and the development efficiency is improved. Now, it has been widely used in automotive electronics product development.Aiming at underexploitation of ECU low level driver and the development advantages of FPGA, a relatively universal ECU low level driver platform based on the development ideas of Ⅴ pattern is established. Repeatable configuration of FPGA technology is used to realize the hardware structure of custom function on hardware; Software using the graphical programming software platform NI Lab VIEW is used to build the rapid control prototype of low level driver.Based on data flow effective development process, each development module could be linked up availably in the whole development process of platform. In the implementation process of low-level driver, each function module has been encapsulated into sub-Ⅵ by using modular design, so that development efficiency could be improved, the change management and transplantation of driver software were facilitated and the purpose to save time and reduce costs has been achieved. Finally, the system could reach optimal performance through the adjusting the control parameters of each function algorithm flexibly. The development content of driving system is listed as follow:Fist, aimed at the development orientation and actual demand of experimental ECU low-level driver, the detailed analysis on demand and achievement of the whole low-level driver system and key modules have been done. Based on system analysis, the low-level driver’s overall design has processed through the aspects of function, structure and data flow.Then, with NI7833R as hardware platform of low-level driver system and the help of Lab VIEW FPGA module, some ECU modules have been developed by modular design ideas, for instance, sensor signal acquisition module, the error uniformity frequency multiplication module, the speed signal cycle measurement module, the speed signal rationality detection module, rapid cylinder detection driver module, fuel injection driver module, the rail pressure driver module, etc. The main function of speed signal rationality detection module is to measure the cycle length of speed signal, test its reasonableness and realize the frequency doubling of crankshaft signal. Fuel injection driving adopted the control algorithm of time-share driver under high and low pressure. In the meantime, the multi-parameter control fuel injector imported to guarantee that the electric current in peak and hold stage keep at about18A and12A respectively.Finally, the joint operation of driver system, driver board and actuator has been facilitated after simulating driver system’s operation and testing its logic functionality in the PC. Operation results show that the low-level driver can collect sensor signal in real time, detect cylinder quickly and can realize fuel meticulous injection according to the read of data. The driver system with high performance and strong real-time performance satisfied the original design requirement as a whole.
Keywords/Search Tags:High pressure common-rail, Diesel engine, FPGA, Lab VIEW
PDF Full Text Request
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