Research On The Phase-locked-loop Under Unbalanced And Disturbed Grid Condition

Environmental pollution and energy crisis promote the rapid development ofdistributed generation systems based on wind, solar and other new energy. Thedistributed generation systems must be able to meet the low voltage ride throughstandards and Anti-islanding standards. Detecting grid amplitude, phase and frequencyinformation quickly and accurately is an important guarantee for low voltage ridethrough and Anti-islanding. Phase-locked loop (PLL) is an important way to obtainthose information of grid, and the standard of low voltage ride thought andAnti-islanding have different requirement on PLL. When the grid is balance, thesynchronous reference frame PLL is an effective method of monitoring grid, and can getthe grid phase imformation rapidly and accurately. However, the phase imformation gotby the synchronous reference frame PLL is easily affected by second harmonicdisturbance under unbalanced grid. For this shortcoming, the phase-locked looptechnology under unbalanced and disturbed grid condition is researched in this paper.Firstly, this paper studies the extraction of positive sequence fundamentalfrequency component of the grid voltage under the unbalanced grid. Based on theresearch and analysis of the unbalanced three-phase voltage vector and quadraturesignal generator, a new classification conception based on filtering methods is proposed,then a variety of method of positive and negative sequence voltage decoupling areproposed. The transfer functions of each method are analyzed in detail, and equivalenceof those transfer function is analysed. At last, a research of how to eliminate the effectof low harmonic on the phase locked loop is made of.Secondly, combining the positive and negative sequence voltage decouplingmodule with the synchronous reference frame PLL, a variety of three phase PLLs underunbalanced and distributed grid are designed and the advantages and disadvantages ofeach PLLs are analyzed. The unified small-signal model of designed PLLs is researched,which simplifes the parameter design and the stability analysis. Then, a systematicdesign procedure to fne tune the PLLs parameters are presented. The stability margin,the transient response, and the disturbance rejection capability are the key factors that are considered in the design procedure.Finally, the steady-state response and dynamic response of each PLL underunbalanced grid are analysed thought simulation experiment and TMS320F28335experiment platform experiment. Experimental results show each designed PLL candetect voltage phase accurately under unbalanced and disturbed grid. At last theadvantages and disadvantages are listed in a figure.