Research And Design Of Low Phase Noise Phase Locked Loop For Radio Frequency Transmitter

In integrated circuits and communication systems,phase-locked loops are widely used to generate clocks or carriers.With the development of modern technology,not only the frequency generated by PLL is required to be more accurate and stable,but also higher requirements are put forward for reducing the phase noise of PLL in order to reduce noise and interference.Therefore,the research and design of low phase noise PLL become more important with the development of electronic technology.In this paper,the noise models of the traditional charge pump phase-locked loop and the subsampled phase-locked loop are studied,the stability of the phase-locked loop is analyzed,and an improved subsample phase-locked loop structure is proposed to reduce the noise of the phase-locked loop.According to the design index,according to the module circuit function,especially from the low noise point of view,the phase detector,charge pump,filter,voltage control oscillator and other modules were designed,and the functions and technical specifications of each module were simulated and verified based on the SMIC 0.18μm CMOS process.In order to verify the low noise characteristics of the phase-locked loop,the pre-simulation and post-simulation of the phase-locked loop circuit and layout were performed,and the results of the previous simulation showed that the overall power consumption of the phase-locked loop was 3.387mW,the locking frequency range was 180MHz-440MHz,the locking time was 9.352μs,and the overall phase noise was-At 105.133dBc/Hz@1MHz,the simulation results show that the overall phase noise of the phase-locked loop is-103.019dBc/Hz@1MHz,and the simulation results show that the lownoise design scheme and the module low-noise design technology in this paper are feasible and meet the design requirements of low phase noise.The low phase noise phase-locked loop designed in this paper is embedded in the RF transmitter circuit and the tape-out is carried out,and the output frequency of the chip is measured when the chip is connected to the crystal oscillator of 9.84375MHz,which proves that the phase-locked loop circuit is designed correctly,the work is stable,and the locking frequency is accurate;The overall phase noise of the RF transmitter chip is 80.31 dBc/Hz@1 MHz,which meets the engineering design goals and application requirements.