The Design And Validation For Peripherals Of32Bits Fixed Point DSP

As the rapid development of IC and international communication industryand the DSP technology widely used in fields of communication, automationcontrol, space technology, DSP processor is developing fast both in structuredesign and manufacture process. Thus the design of IP core with intellectualproperty rights is very important.In this paper, we start work focus on the design of32-bit fixed point DSP.The author is responsible for the design of peripheral modules such as SCI, onchip FLASH test interface design, timer design and internal ROM design. Basedon the general purpose32bit fixed point DSP, we discuss the feature of peripheraland structure of DSP core. In this paper we respectively study serialcommunication interface, on chip FLASH test interface, timer and on chip ROMdetailedly.We divide serial port into some modules by function. We finish the design ofserial port control register and function description, it realize the control for theserial port. We complete the module of clock and frame synchronous design, itrealized any frequency division. We finished finite state machine for transmitterand receiver. We use master-slave finite state machine to improve the reliabilityand the rate of communication.By analyzing the interface of Flash IP and the test requirement, we realizethe pin multiplexing logic design and the address/data converter logic design.The design reduces the number of test pins while accurately and completely testthe on-chip Flash.We compile38instructions into machine code. We down load these programto the inter RAM by the designed serial communication interface. We realize thetest for the DSP. From the verification results a+c=0x16stored in address1002, the jump instruction branch address003. We can know that the DSP correctlyexecute the compiled code.