The Development And Research On ISA Processor Platform Based On LSI

With the development of society, there is an upward trend in the demand for mi-cromanipulation not only in the field of manufacturing production but also in people’s daily life. However, the internal limited logic resources and external fixed-pin package which traditional microprocessors are composed of have seriously constrained their ranges of application. Since there are different varieties of microprocessors in market, we have to spend lots of money to buy w wide range of platforms so as to learn more about the technology, leading to a definite waste of resources.In this paper, firstly we make a thorough description of composition, memory organization and instruction architecture of traditional microprocessors, after which a clear understanding of microprocessors will be obtained. Next, we make an analysis about the inside structure of FPGA, finding that we can make full use of the abundant logic resources to implement the various components of the traditional microprocessors and that we can use their configurable10pins to reduce the degree of the complexity of the design of hardware. Finally, we have a discussion on the architecture of Wishbone bus which is used as a connection between each module.The programming operations accord with standard microprocessors for upper software engineers through this way to build the system. On the other hand, the largest extent of freedom of hardware can be obtained by using the configurable IO pins freely. Owing to adopting the on-chip bus, we are able to customize the system in terms of our needs, such as the need to increase the variety of peripherals so that we can achieve the requirements that cannot be acquired by the standard microprocessors. Besides, if this method is used in teaching experiments in universities, that will help students to get a deeper understanding of the function of each component in microprocessors without making any damages to hardware.We use hardware description language in this paper, such as VHDL and Verilog. And we design the bottom-up series of the operating cores of MIPS,8086,80C51and AVR. Meantime, we connect those cores with some general peripherals to build a minimal system running the system in FPGA of "Virtex-Ⅱ Pro series" in order to verify Level verification Boards. In the end, the result from Level verification Boards suggests that we have achieved our set objective which is to say that the system has better compatible with the standard microprocessors and runs stable.