The Key Technology Research Of Paper Defect Detection System Based On FPGA

With the rapid development of the papermaking industry, people for the quality of the paper is ever increasing, and with the promotion of high-speed paper machine, paper machine web widening again, acelerat-ing the speed, to the paper surface quality detection, the paper defect bring huge difficulties on-line detection. The traditional paper defect detection based on machine vision technology is to use "CCD camera+ PC" mode, although this method has strong function, simple structure, convenient operation and advantages of the algorithm is easy to implement, and achieved good application result in a low speed narrow paper within the scope of the paper machine, but with the increase in machine speed and paper web width, the processing speed of this mode is increasingly prominent, more and more difficult to meet the requirements of real-time paper production. And based on "CCD camera +FPGA+DSP+PC "paper defect detection system, but also has complicated structure, long development cycle, the disadvantage of poor commonality.Therefore, this thesis proposes a "CCD camera+FPGA+PC" mode of paper defect detection scheme, making full use of FPGA parallel pipelined processing architecture brings the advantages of FPGA high computing speed, which is used in paper production line, the separation operation and administrative tasks were borne by the FPGA and PC. FPGA share the image preprocessing, feature extraction and classification of detection algorithm, and other functions, such as defect detection system which can overcome the paper core-the problem of low cimputing speed of PC serial manner. The major work includes the following sections:(I) To determine the "CCD camera+FPGA+PC" working mode. Through the study on the mode of "CCD camera+ PC", analyzing the mode of the defect detection system processing speed, because of bottlenecks and for the serial presence proposed a solution:previously conducted on PC image processing algorithm on the FPGA implementation for the most part, using the FPGA parallel lines of work mode improve the processing speed, to ensure the rapidity of system processing;(II) On paper defect detection algorithm is studied, which incloud: image preprocessing, feature extraction, image classification these parts. In the study of algorithms to common paper defect types (black, bright spots, edge cracks, holes) as the research object, analyzes the feature of the four paper defect and research, determine the specific image processing algorithms:median filtering, edge detection, GLCM feature extraction, the bayesian classification;(III) Design and implementation of the system functions, the whole system is divided into two parts design, The first part of the FPGA design, which is divided into seven sub function module:image acquisition module, format conversion module, storage module, pretreat-ment module,feature extraction,classifier module,serial communication module, which will be partially successful GLCM image extraction algorithms and bayes algorithms ported to the FPGA side, and applied to image feature extraction and classification of quantity; The second part for PC computer design, mainly through Qt Creator PC development can be divided into three parts, respectively for the login interface design, the main interface design and interface design, to achieve real-time data is read, real-time display, control buttons, database read and write functions.In this article, the implementation of paper defect detection system based on FPGA, breaking the originally single PC through serial way to deal with the data of the deadlock, using parallel processing characteristic of FPGA will increase the speed of paper defect detection, to ensure the real-time paper defect detection, through a large number of experiments have proved this system has high accuracy and real-time performance. Through the system for statistical test paper on test results, the precision can achieve 92% above, and the image processing speed is only 1/10 of the time for PC processing, thus verified the system has high accuracy and real-time performance.