| With the rapid development of microelectronics tec hnology and widespread use of electronic products, the demand of electronic market for power supply is becoming more and more increase. Switch- mode power supply has been widely favored in market due to the characteristics of high efficiency, less periphera l devices, and small size. However, traditional switch-mode power supply cannot meet the demand s for portable instrumentation, distributed power s ystems, battery-powered devices for its small load capacity, high ripple and so on. Hence the research of power IC equipped with small ripple, low-power, low- noise, high- frequency, high load applications has become imperative.In this paper, a multiphase, wide- frequency-range, high-current buck DC/DC chip is designed and realized on the basis of the working principle of the step-down DC/DC. The chip adopts the peak current mode control which improve the transient response speed of input voltage and load current, and has the characteristics of eas ier to compensate and large frequency range. Also the chip is controlled by PWM in heavy load and by optional FCCM and BURST mode in light load in order to realize the compromise of efficiency in full load range and output ripple. In order to realize multiphase, wide frequency range and large current, the main implementatio n techniques, phase- locked loop technology and multiphase technology, are analyzed in detail in this paper. The application of PLL technique, which can ensure the internal clock signal is consistent with the external, can capture the 0.75 MHz to 2.25 MHz wide range and meet many applications which need different switch frequency. Multiphase operation using interleaved parallel structure and PLL technology can realize that multiple chips work out of phase using minimal input and output capacitance, which meet small ripple, high current, high efficiency requirements. The chip can be realized up to twelve phase in parallel, and the maximum load current is up to 96 A, which meet the large current demand. For the uneven of power distribution in parallel power, the alternative modes of multi- master and single- master are designed in this chip in order to realize the compromise of plurality of chips on the load flow and stability in the multiple chips. In order to ensure that in a single electron device multiple chips w ith different output voltages have right sequencing in the starting process, The function oftrack is introduced in the chip, and it can achieve coincident sequencing and ratiometric sequencing of output voltage. Besides, the functions of over temperature protection, input undervoltage protection, output overvoltage protection, short circuit protection, over current protection are also integrated in the chip to ensure the normal use of chip.The article first introduces the background and significance of the subject. Then elaborates the principle of buck DC /DC converter. And then introduces the main implementation technology of multiphase, large- frequency-range, and large-current, PLL technology and multiphase technology. The problem of uneven of power distribution in parallel power is analyzed in detail. O n the basis of these, the whole system is designed in this thesis. And the paper focuses on the analysis and design of the circuits of reference voltage generating module, an error amplifier, a current sampling module and so on.The multiphase, wide-frequency-range, high-current buck DC /DC chip proposed in this paper uses 0.35μm BCD process, and the functions of a single chip and multi-chips are simulated using Spectre simulator on the base of Cadence software platform, including different temperature and different corner. Now the chip has been taped out and some functions have been tested. |
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