Hardware Design Of DPO Embedded Processing Platform Based On OMAP-L138

Growing market demands result in more frequent updates of digital oscilloscope than ever and more diverse in terms of functionality. Commonly speaking, those with high sampling rate, bandwidth, capturing rate among other excellent characteristics stand out. Nowadays, interface and customer experience are also crucial to product quality. Moreover, in order to improve its expansion and data sharing capability, more external communication interfaces are required. Currently, most traditional oscilloscopes made in China are using DSP as processor which take advantage of running speed and real-time data processing. However, with increasing number of incoming data and external interfaces, the disadvantage of lacking control capability becomes more clear. In contrast, the ARM has stronger systems management capabilities.In this paper, DSP+ARM dual-core architecture processors OMAP-L138 that TI developed is used to build an oscilloscope embedded processing hardware platform. The processing platform has the advantages of traditional DSP platform’s powerful computing capability, while having the features of ARM embedded platform. It can run Linux operating system and facilitate the development of interactive interface. The design is highly integrated, low cost, and easy to develop, and cost efficiency and market competitiveness.This topic is a sub-item of the three-dimensional oscilloscope. The design is based on embedded processing platform OMAP-L138, which can meet the target of peripheral equipment, interface control, and data transfer between the processor and FPGA for data transferring and display. The main contents of this paper include:1. Hardware design for system peripheral communication interface. After core FPGA devices are determined, the RS-232 interface, Ethernet interface, SD card interfaces, USB OTG interface and VGA interface are individually analyzed with the combination of OMAP-L138 peripheral resources. Hardware design and the circuit diagram are followed.2. Design of hardware for system configuration. This section includes the processor clock and reset, DDR2 SDRAM, the selection and design of the Flash and ferroelectric memories, analysis and design of the BOOT circuit and power systems. It concludes with proposed issue for system clock in terms of perspective of3. To exchange data between OMAP-L138 with FPGA, EMIFA interface and uPP interface are used. As precondition, this paper elaborates the data transmission design and display design of the system through the analysis of the transmission efficiency.4. Finally, the system hardware debugging process is conducted and results are presented which prove to achieve design concept. Concerns and improvement are proposed.