The Hardware Design Of Multichannel Data Generator

As a common basic instrument in digital test system, data generator has become one of the essential testing equipments and plays an important role in digital systems research and development. The topic provide the multichannel data generator technology research to complete the hardware design of multi-channel data generator and meet the domestic mainstream demand for data generator. This paper describes the realization of the function of the multi-channel data generator and the channel design. Specific work content is as follows:(1) The paper analyzes the multi-channel data generator design goals and formulate an overall design. In this paper, the design is divided into timing data synthesis module for multi-channel data generator function indicators and a data signal conditioning channels for achieving the signal high-low control requirements. The paper analyzes the difficulty of the hardware design of the multi-channel data generator.(2) The design of Multi-channel data generator control unit and the data synthesis. It mainly introduces the design of the sequence data storage unit. It introduces the timing design of the data storage control, the dispose of running mode and the coordination between each modules, analyzing the implementation process of each function. It also introduces the data stream synthesis scheme of two kinds of channel. Using the parallel to serial converter module of FPGA and external parallel to serial converter chip to achieve high speed data synthesis.(3) Describes the design of multi-channel data channel generator. Because of different data rates of the two kinds of channels, and other indicators requirements such as high-low level, parallel channels use pin driver while the serial channel use pin driver and bias tee to complete the signal amplitude,offset and high-low level regulation. This paper will analyz the design principle and detail its hardware design ideas and concrete implementation.(4) Describes the debugging process of each unit module. According to the target, giving the test signal waveform analysis units working conditions, elaborate solution. Finally, summarize the overall scheme, proposed improvements.