Font Size: a A A

Research And Design On Control Loop Of High Current Buck Converter With External Clock Synchronization

Posted on:2017-01-19Degree:MasterType:Thesis
Country:ChinaCandidate:J K WangFull Text:PDF
GTID:2272330485488299Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Increasingly powerful electronic systems use point of load power supply mostly, which is high reliability, high efficiency and high power density. Even some battery-powered equipment requirements the power converter can work properly at a very low input voltage. These demands will bring the design of voltage converter new challenges undoubtedly. Current-mode switching power converters are widely used for point of load power because of simple loop compensation and good dynamic performance. However, the current-mode switching power converters are susceptible to a number of issues, such as improper slope compensation that lead to sub-harmonic oscillation or poorer loop response.This paper aims to design a high performance monolithic current mode step-down switching power supply, and the input voltage is 4V to 7V, and the output voltage is 0.8V to 6.3V, and the maximum load current can reach 6A. Its main feature is that switching frequency can be adjusted depending on the application or external synchronization. Howere, the change of switching frequency will affect the slope compensation and stability of the control loop which is analyzed and studied in the paper. Based on the analysis of the traditional linear slope compensation and the secondary slope compensation, the paper proposes a novel adaptive secondary slope compensation circuit, which can vary adaptively not only according to the output and input voltage but also switching frequency and inductor value, so that the current control loop have a very good transient response under different application conditions. In addition, in order to make the switching converter has a high efficiency at the full range of load conditions, the PWM and PSM are used. The error amplifier is also improved to make the system’s transient response improved greatly.Finally, the switching converter is designed based on 0.35 μ m BCD process, and all the simulation results meet the requirements. Currently the whole layout has been design succfully and passed DRC rules and LVS verification.
Keywords/Search Tags:Current mode control, Slope compensation, Dual-mode modulation
PDF Full Text Request
Related items