Study On Key Technologies In Earthquake Early Warning Of High Speed Railways And System Design

With the rapid development of high-speed railways in China, small earthquakes may greatly impact the stability of the running high-speed train, cause serious accident which threaten lives of the passengers. Earthquake is a kind of natural disasters which has low probability but can cause great damage, and China is an earthquake-prone country, so Chinese high-speed railways is under threaten from earthquake. After an earthquake happens, earthquake early warning system can stop the high-speed train running in damaging range before the damaging earthquake waves arrive to reduce losses. Therefore,the development of earthquake early warning system for high speed railway in China is very urgent. In this paper, the key technology of high speed railway earthquake early warning—— data acquisition technology—— is studied, and a data acquisition system is designed,.The main work is as follows:1、This paper introduces the principle and current development situation of earthquake early warning for high speed railway, and studies continuous positioning and magnitude calculation, which are the two core parts of earthquake early warning. The key research is on the key supporting technology—— data acquisition technology.2、This paper designs a data acquisition system based on C/S architecture, describes the designed client based on LabVIEW in detail, and puts forward the design framework of the seismic stations, including power supply module, data acquisition system and clock synchronization module.3、This paper developes a high precision seismic stations data acquisition system,which is based on STM32 + FPGA structure. Module ES-T is a triaxial force balance accelerometer,which is choosed to be the seismic signal sensor. 32-bits ADC chip ADS1281 is used for AD conversion, and the FPGA parallel reads multi-channel AD data.AD data will be packaged and sent to STM32 microcontroller by SPI, and data transmission over Ethernet is realized by transplanting LWIP in STM32.4、This paper developes a high precision clock synchronization module, which is based on STM32 + FPGA structure. The main synchronous clock is network PPS clock,which is produced by DP83640 chip by IEEE- 1588 Precision Time Protocol, and the backup synchronous clock is satellite PPS clock, which is produced by UM220 module.This paper realizes a high precision time interval measurement method based on PLLs delay in FPGA, and uses kalman filter to realize the constant temperature crystal vibrationfrequency correction and local PPS clock phase correction function.5、The designed data acquisition system and clock synchronization module has been carried on the experiment test. Test results show that SNR is better than 140 db when the sampling rate is 200 SPS, and clock synchronization accuracy better than 5 ns under the condition of laboratory.